From 918234ce80c445db1201b4468a5a66ca687fcecd Mon Sep 17 00:00:00 2001 From: Justine Tunney Date: Wed, 3 Jul 2024 05:38:46 -0700 Subject: [PATCH] Remove flush to zero from bf16 After closely analyzing Google Brain codebases, we decided that flushing to zero was the wrong thing to do. Intel and AMD probably designed their microprocessors to always flush to zero for the wrong reasons. It should have been made conditional on FTZ being set in MXCSR like other opcodes. See ggerganov/llama.cpp#7843 --- bf16.h | 8 -------- 1 file changed, 8 deletions(-) diff --git a/bf16.h b/bf16.h index c63305f..3c160f4 100644 --- a/bf16.h +++ b/bf16.h @@ -52,10 +52,6 @@ static inline float from_brain(uint16_t h) { /** * Converts float32 to brain16. - * - * This function is binary identical to AMD Zen4 VCVTNEPS2BF16. - * Subnormals shall be flushed to zero, and NANs will be quiet. - * This code should vectorize nicely if using modern compilers. */ static inline uint16_t to_brain(float s) { uint16_t h; @@ -68,10 +64,6 @@ static inline uint16_t to_brain(float s) { h = (u.i >> 16) | 64; /* force to quiet */ return h; } - if (!(u.i & 0x7f800000)) { /* subnormal */ - h = (u.i & 0x80000000) >> 16; /* flush to zero */ - return h; - } return (u.i + (0x7fff + ((u.i >> 16) & 1))) >> 16; }