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MLX_SWITCH macros to templates (#2320)
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@@ -152,35 +152,29 @@ void ArgReduce::eval_gpu(const std::vector<array>& inputs, array& out) {
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encoder.set_input_array(in);
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encoder.set_output_array(out);
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encoder.launch_kernel([&](cudaStream_t stream) {
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MLX_SWITCH_REAL_TYPES_CHECKED(in.dtype(), "ArgReduce", CTYPE, {
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using InType = cuda_type_t<CTYPE>;
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dispatch_real_types(in.dtype(), "ArgReduce", [&](auto type_tag) {
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using T = cuda_type_t<MLX_GET_TYPE(type_tag)>;
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constexpr uint32_t N_READS = 4;
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MLX_SWITCH_BLOCK_DIM(cuda::ceil_div(axis_size, N_READS), BLOCK_DIM, {
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dim3 num_blocks = get_2d_grid_dims(out.shape(), out.strides());
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dim3 block_dims{BLOCK_DIM, 1, 1};
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auto kernel = &cu::arg_reduce_general<
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InType,
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cu::ArgMax<InType>,
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BLOCK_DIM,
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N_READS>;
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if (reduce_type_ == ArgReduce::ArgMin) {
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kernel = &cu::arg_reduce_general<
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InType,
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cu::ArgMin<InType>,
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BLOCK_DIM,
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N_READS>;
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}
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kernel<<<num_blocks, block_dims, 0, stream>>>(
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in.data<InType>(),
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out.data<uint32_t>(),
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out.size(),
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const_param(shape),
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const_param(in_strides),
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const_param(out_strides),
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ndim,
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axis_stride,
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axis_size);
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});
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dispatch_block_dim(
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cuda::ceil_div(axis_size, N_READS), [&](auto block_dim) {
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dim3 num_blocks = get_2d_grid_dims(out.shape(), out.strides());
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auto kernel =
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cu::arg_reduce_general<T, cu::ArgMax<T>, block_dim(), N_READS>;
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if (reduce_type_ == ArgReduce::ArgMin) {
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kernel = cu::
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arg_reduce_general<T, cu::ArgMin<T>, block_dim(), N_READS>;
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}
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kernel<<<num_blocks, block_dim(), 0, stream>>>(
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in.data<T>(),
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out.data<uint32_t>(),
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out.size(),
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const_param(shape),
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const_param(in_strides),
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const_param(out_strides),
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ndim,
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axis_stride,
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axis_size);
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});
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});
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});
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}
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