mirror of
https://github.com/ml-explore/mlx.git
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1792 lines
52 KiB
C++
1792 lines
52 KiB
C++
// Copyright © 2025 Apple Inc.
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#include <metal_simdgroup>
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#include <metal_stdlib>
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constant bool align_M [[function_constant(200)]];
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constant bool align_N [[function_constant(201)]];
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constant bool align_K [[function_constant(202)]];
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using namespace metal;
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#define MLX_MTL_CONST static constant constexpr const
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MLX_MTL_CONST int SIMD_SIZE = 32;
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MLX_MTL_CONST int QUAD_SIZE = 4;
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template <int wsize = 8>
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inline constexpr short get_pack_factor() {
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return wsize / 4;
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}
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template <int wsize = 8>
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inline constexpr short get_bytes_per_pack() {
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return wsize / 8;
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}
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template <typename T>
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static inline T dequantize_scale(uint8_t s) {
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using FOrI = union {
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bfloat16_t f;
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uint16_t i;
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};
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FOrI out;
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out.i = (s == 0 ? 0x40 : (static_cast<uint16_t>(s) << 7));
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return static_cast<T>(out.f);
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}
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template <typename T, typename U, int values_per_thread>
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inline void load_vector(const device T* x, thread U* x_thread) {
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for (int i = 0; i < values_per_thread; i += 4) {
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x_thread[i] = x[i];
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x_thread[i + 1] = x[i + 1];
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x_thread[i + 2] = x[i + 2];
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x_thread[i + 3] = x[i + 3];
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}
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}
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template <typename T, typename U, int values_per_thread>
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inline void load_vector_safe(const device T* x, thread U* x_thread, int N) {
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for (int i = 0; i < N; i += 4) {
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x_thread[i] = x[i];
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x_thread[i + 1] = x[i + 1];
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x_thread[i + 2] = x[i + 2];
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x_thread[i + 3] = x[i + 3];
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}
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for (int i = N; i < values_per_thread; i++) {
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x_thread[i] = 0;
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}
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}
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constexpr constant static float MXFP4_LUT[16] = {
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+0.0f,
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+0.5f,
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+1.0f,
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+1.5f,
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+2.0f,
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+3.0f,
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+4.0f,
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+6.0f,
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-0.0f,
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-0.5f,
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-1.0f,
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-1.5f,
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-2.0f,
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-3.0f,
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-4.0f,
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-6.0f};
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template <typename T>
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void load_mxfp4_lut(threadgroup T* lut, uint simd_gid, uint simd_lid) {
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if (simd_gid == 0 && simd_lid < 16) {
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lut[simd_lid] = static_cast<T>(MXFP4_LUT[simd_lid]);
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}
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threadgroup_barrier(mem_flags::mem_threadgroup);
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}
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template <typename U, int values_per_thread>
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inline U qdot(
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const device uint8_t* w,
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const thread U* x_thread,
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U scale,
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const threadgroup U* lut) {
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U accum = 0;
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const device uint16_t* ws = (const device uint16_t*)w;
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for (int i = 0; i < (values_per_thread / 4); i++) {
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accum +=
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(x_thread[4 * i] * lut[ws[i] & 0xf] +
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x_thread[4 * i + 1] * lut[(ws[i] >> 4) & 0xf] +
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x_thread[4 * i + 2] * lut[(ws[i] >> 8) & 0xf] +
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x_thread[4 * i + 3] * lut[(ws[i] >> 12) & 0xf]);
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}
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return scale * accum;
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}
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template <typename U, int values_per_thread>
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inline U qdot_safe(
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const device uint8_t* w,
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const thread U* x_thread,
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U scale,
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const threadgroup U* lut,
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int N) {
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U accum = 0;
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const device uint16_t* ws = (const device uint16_t*)w;
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for (int i = 0; i < (N / 4); i++) {
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accum +=
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(x_thread[4 * i] * lut[ws[i] & 0xf] +
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x_thread[4 * i + 1] * lut[(ws[i] >> 4) & 0xf] +
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x_thread[4 * i + 2] * lut[(ws[i] >> 8) & 0xf] +
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x_thread[4 * i + 3] * lut[(ws[i] >> 12) & 0xf]);
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}
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return scale * accum;
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}
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template <typename U, int values_per_thread>
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inline void qouter(
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const thread uint8_t* w,
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U x,
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U scale,
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thread U* result,
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const threadgroup U* lut) {
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for (int i = 0; i < (values_per_thread / 2); i++) {
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result[2 * i] += x * scale * lut[w[i] & 0xf];
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result[2 * i + 1] += x * scale * lut[(w[i] >> 4) & 0xf];
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}
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}
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template <typename U, int N>
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inline void dequantize(
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const device uint8_t* w,
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U scale,
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threadgroup U* w_local,
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const threadgroup U* lut) {
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for (int i = 0; i < (N / 2); i++) {
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w_local[2 * i] = scale * lut[w[i] & 0xf];
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w_local[2 * i + 1] = scale * lut[(w[i] >> 4) & 0xf];
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}
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}
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template <
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typename T,
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short BROWS,
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short BCOLS,
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short dst_ld,
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short reduction_dim,
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short tgp_size,
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short group_size,
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typename S>
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struct QuantizedBlockLoader {
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static_assert(
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BCOLS <= group_size,
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"The group size should be larger than the columns");
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static_assert(
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group_size % BCOLS == 0,
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"The group size should be divisible by the columns");
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MLX_MTL_CONST short pack_factor = get_pack_factor<8>();
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MLX_MTL_CONST short bytes_per_pack = get_bytes_per_pack();
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MLX_MTL_CONST short BCOLS_PACKED = BCOLS / pack_factor;
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MLX_MTL_CONST short n_reads =
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(BCOLS_PACKED * BROWS < tgp_size) ? 1 : (BCOLS_PACKED * BROWS) / tgp_size;
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MLX_MTL_CONST short group_steps = group_size / BCOLS;
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const int src_ld;
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const int tile_stride;
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short group_step_cnt;
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const int group_stride;
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const short thread_idx;
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const short bi;
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const short bj;
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threadgroup T* dst;
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const device uint8_t* src;
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const device S* scales;
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threadgroup T* lut;
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QuantizedBlockLoader(
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const device uint8_t* src_,
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const device S* scales_,
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const int src_ld_,
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threadgroup T* dst_,
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threadgroup T* lut_,
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ushort simd_group_id [[simdgroup_index_in_threadgroup]],
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ushort simd_lane_id [[thread_index_in_simdgroup]])
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: src_ld(src_ld_),
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tile_stride(
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reduction_dim ? BCOLS_PACKED * bytes_per_pack
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: BROWS * src_ld * bytes_per_pack / pack_factor),
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group_step_cnt(0),
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group_stride(BROWS * src_ld / group_size),
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thread_idx(simd_group_id * 32 + simd_lane_id),
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bi(n_reads * thread_idx / BCOLS_PACKED),
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bj((n_reads * thread_idx) % BCOLS_PACKED),
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dst(dst_ + bi * dst_ld + bj * pack_factor),
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src(src_ + bi * src_ld * bytes_per_pack / pack_factor +
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bj * bytes_per_pack),
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scales(scales_ + bi * src_ld / group_size),
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lut(lut_) {
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load_mxfp4_lut(lut, simd_group_id, simd_lane_id);
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}
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void load_unsafe() const {
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if (BCOLS_PACKED * BROWS < tgp_size && bi >= BROWS) {
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return;
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}
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T scale = dequantize_scale<T>(*scales);
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for (int i = 0; i < n_reads; i++) {
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dequantize<T, pack_factor>(
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src + i * bytes_per_pack, scale, dst + i * pack_factor, lut);
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}
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}
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void load_safe(short2 src_tile_dim) const {
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if (BCOLS_PACKED * BROWS < tgp_size && bi >= BROWS) {
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return;
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}
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if (reduction_dim == 1 && bi >= src_tile_dim.x) {
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for (int i = 0; i < n_reads * pack_factor; i++) {
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dst[i] = T(0);
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}
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return;
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}
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if (reduction_dim == 0 && bi >= src_tile_dim.y) {
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for (int i = 0; i < n_reads * pack_factor; i++) {
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dst[i] = T(0);
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}
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return;
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}
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T scale = dequantize_scale<T>(*scales);
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for (int i = 0; i < n_reads; i++) {
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dequantize<T, pack_factor>(
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(device uint8_t*)(src + i * bytes_per_pack),
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scale,
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dst + i * pack_factor,
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lut);
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}
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}
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void next() {
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src += tile_stride;
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if (reduction_dim == 1) {
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if (group_steps > 1) {
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group_step_cnt++;
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if (group_step_cnt == group_steps) {
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group_step_cnt = 0;
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scales++;
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}
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} else {
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scales++;
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}
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} else {
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scales += group_stride;
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}
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}
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};
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template <typename T, int group_size, typename S, int D>
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METAL_FUNC void mxfp4_qmv_quad_impl(
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const device uint32_t* w,
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const device S* scales,
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const device T* x,
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device T* y,
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constant int& in_vec_size,
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const constant int& out_vec_size,
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uint3 tid [[threadgroup_position_in_grid]],
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uint quad_gid [[quadgroup_index_in_threadgroup]],
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uint quad_lid [[thread_index_in_quadgroup]],
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uint simd_gid [[simdgroup_index_in_threadgroup]],
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uint simd_lid [[thread_index_in_simdgroup]],
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threadgroup float* lut) {
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constexpr int quads_per_simd = SIMD_SIZE / QUAD_SIZE;
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constexpr int pack_factor = 8;
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constexpr int values_per_thread = D / QUAD_SIZE;
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constexpr int packs_per_thread = values_per_thread / pack_factor;
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constexpr int scale_step_per_thread = group_size / values_per_thread;
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constexpr int results_per_quadgroup = 8;
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typedef float U;
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thread U x_thread[values_per_thread];
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thread U result[results_per_quadgroup] = {0};
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load_mxfp4_lut(lut, simd_gid, simd_lid);
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// Adjust positions
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const int in_vec_size_w = in_vec_size / pack_factor;
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const int in_vec_size_g = in_vec_size / group_size;
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const int out_row = tid.y * quads_per_simd * results_per_quadgroup + quad_gid;
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w += out_row * in_vec_size_w + quad_lid * packs_per_thread;
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scales += out_row * in_vec_size_g + quad_lid / scale_step_per_thread;
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x += tid.x * in_vec_size + quad_lid * values_per_thread;
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y += tid.x * out_vec_size + out_row;
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load_vector<T, U, values_per_thread>(x, x_thread);
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for (int row = 0; row < results_per_quadgroup; row++) {
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auto wl = (const device uint8_t*)(w + row * in_vec_size_w * quads_per_simd);
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const device S* sl = scales + row * in_vec_size_g * quads_per_simd;
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U s = dequantize_scale<U>(sl[0]);
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if (row * quads_per_simd + out_row < out_vec_size) {
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result[row] += qdot<U, values_per_thread>(wl, x_thread, s, lut);
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}
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}
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for (int row = 0; row < results_per_quadgroup; row++) {
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result[row] = quad_sum(result[row]);
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if (quad_lid == 0 && row * quads_per_simd + out_row < out_vec_size) {
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y[row * quads_per_simd] = static_cast<T>(result[row]);
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}
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}
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}
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template <typename T, int group_size, typename S>
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METAL_FUNC void mxfp4_qmv_fast_impl(
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const device uint32_t* w,
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const device S* scales,
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const device T* x,
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device T* y,
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const constant int& in_vec_size,
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const constant int& out_vec_size,
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uint3 tid [[threadgroup_position_in_grid]],
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uint simd_gid [[simdgroup_index_in_threadgroup]],
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uint simd_lid [[thread_index_in_simdgroup]],
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threadgroup float* lut) {
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constexpr int packs_per_thread = 2;
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constexpr int num_simdgroups = 2;
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constexpr int results_per_simdgroup = 4;
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constexpr int pack_factor = get_pack_factor<32>();
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constexpr int bytes_per_pack = get_bytes_per_pack<32>();
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constexpr int values_per_thread = pack_factor * packs_per_thread;
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constexpr int block_size = values_per_thread * SIMD_SIZE;
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constexpr int scale_step_per_thread = group_size / values_per_thread;
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const device uint8_t* ws = (const device uint8_t*)w;
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typedef float U;
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thread U x_thread[values_per_thread];
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thread U result[results_per_simdgroup] = {0};
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load_mxfp4_lut(lut, simd_gid, simd_lid);
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// Adjust positions
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const int in_vec_size_w = in_vec_size * bytes_per_pack / pack_factor;
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const int in_vec_size_g = in_vec_size / group_size;
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const int out_row = tid.y * (num_simdgroups * results_per_simdgroup) +
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simd_gid * results_per_simdgroup;
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ws += out_row * in_vec_size_w + simd_lid * packs_per_thread * bytes_per_pack;
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scales += out_row * in_vec_size_g + simd_lid / scale_step_per_thread;
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x += tid.x * in_vec_size + simd_lid * values_per_thread;
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y += tid.x * out_vec_size + out_row;
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for (int k = 0; k < in_vec_size; k += block_size) {
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load_vector<T, U, values_per_thread>(x, x_thread);
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for (int row = 0; row < results_per_simdgroup; row++) {
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auto wl = (const device uint8_t*)(ws + row * in_vec_size_w);
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const device auto* sl = scales + row * in_vec_size_g;
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U s = dequantize_scale<U>(sl[0]);
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result[row] += qdot<U, values_per_thread>(wl, x_thread, s, lut);
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}
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ws += block_size * bytes_per_pack / pack_factor;
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scales += block_size / group_size;
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x += block_size;
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}
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for (int row = 0; row < results_per_simdgroup; row++) {
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result[row] = simd_sum(result[row]);
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if (simd_lid == 0) {
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y[row] = static_cast<T>(result[row]);
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}
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}
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}
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template <typename T, int group_size, typename S>
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METAL_FUNC void mxfp4_qmv_impl(
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const device uint32_t* w,
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const device S* scales,
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const device T* x,
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device T* y,
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const constant int& in_vec_size,
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const constant int& out_vec_size,
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uint3 tid [[threadgroup_position_in_grid]],
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uint simd_gid [[simdgroup_index_in_threadgroup]],
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uint simd_lid [[thread_index_in_simdgroup]],
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threadgroup float* lut) {
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constexpr int num_simdgroups = 2;
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constexpr int results_per_simdgroup = 4;
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constexpr int packs_per_thread = 1;
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constexpr int pack_factor = get_pack_factor<32>();
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constexpr int bytes_per_pack = get_bytes_per_pack<32>();
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constexpr int values_per_thread = pack_factor * packs_per_thread;
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constexpr int block_size = values_per_thread * SIMD_SIZE;
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constexpr int scale_step_per_thread = group_size / values_per_thread;
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const device uint8_t* ws = (const device uint8_t*)w;
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typedef float U;
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thread U x_thread[values_per_thread];
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thread U result[results_per_simdgroup] = {0};
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load_mxfp4_lut(lut, simd_gid, simd_lid);
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// Adjust positions
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const int in_vec_size_w = in_vec_size * bytes_per_pack / pack_factor;
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const int in_vec_size_g = in_vec_size / group_size;
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const int out_row = tid.y * (num_simdgroups * results_per_simdgroup) +
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simd_gid * results_per_simdgroup;
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const int used_out_row = min(out_vec_size - results_per_simdgroup, out_row);
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if (out_row >= out_vec_size) {
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return;
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}
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// In this case we need to properly guard all our reads because there isn't
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// even 1 tile in the matrix
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if (out_vec_size < (num_simdgroups * results_per_simdgroup)) {
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ws +=
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out_row * in_vec_size_w + simd_lid * packs_per_thread * bytes_per_pack;
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scales += out_row * in_vec_size_g + simd_lid / scale_step_per_thread;
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x += tid.x * in_vec_size + simd_lid * values_per_thread;
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y += tid.x * out_vec_size + out_row;
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int k = 0;
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for (; k < in_vec_size - block_size; k += block_size) {
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load_vector<T, U, values_per_thread>(x, x_thread);
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for (int row = 0; out_row + row < out_vec_size; row++) {
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auto wl = (const device uint8_t*)(ws + row * in_vec_size_w);
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const device auto* sl = scales + row * in_vec_size_g;
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S s = sl[0];
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result[row] += qdot<U, values_per_thread>(wl, x_thread, s, lut);
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}
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ws += block_size * bytes_per_pack / pack_factor;
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scales += block_size / group_size;
|
|
x += block_size;
|
|
}
|
|
const int remaining = clamp(
|
|
static_cast<int>(in_vec_size - k - simd_lid * values_per_thread),
|
|
0,
|
|
values_per_thread);
|
|
if (remaining > 0) {
|
|
load_vector_safe<T, U, values_per_thread>(x, x_thread, remaining);
|
|
|
|
for (int row = 0; out_row + row < out_vec_size; row++) {
|
|
auto wl = (const device uint8_t*)(ws + row * in_vec_size_w);
|
|
const device auto* sl = scales + row * in_vec_size_g;
|
|
|
|
U s = dequantize_scale<U>(sl[0]);
|
|
result[row] += qdot<U, values_per_thread>(wl, x_thread, s, lut);
|
|
}
|
|
}
|
|
|
|
for (int row = 0; out_row + row < out_vec_size; row++) {
|
|
result[row] = simd_sum(result[row]);
|
|
if (simd_lid == 0) {
|
|
y[row] = static_cast<T>(result[row]);
|
|
}
|
|
}
|
|
}
|
|
|
|
// In this case the last tile is moved back to redo some output values
|
|
else {
|
|
ws += used_out_row * in_vec_size_w +
|
|
simd_lid * packs_per_thread * bytes_per_pack;
|
|
scales += used_out_row * in_vec_size_g + simd_lid / scale_step_per_thread;
|
|
x += tid.x * in_vec_size + simd_lid * values_per_thread;
|
|
y += tid.x * out_vec_size + used_out_row;
|
|
|
|
int k = 0;
|
|
for (; k < in_vec_size - block_size; k += block_size) {
|
|
load_vector<T, U, values_per_thread>(x, x_thread);
|
|
|
|
for (int row = 0; row < results_per_simdgroup; row++) {
|
|
auto wl = (const device uint8_t*)(ws + row * in_vec_size_w);
|
|
const device auto* sl = scales + row * in_vec_size_g;
|
|
|
|
U s = dequantize_scale<U>(sl[0]);
|
|
result[row] += qdot<U, values_per_thread>(wl, x_thread, s, lut);
|
|
}
|
|
|
|
ws += block_size * bytes_per_pack / pack_factor;
|
|
scales += block_size / group_size;
|
|
x += block_size;
|
|
}
|
|
const int remaining = clamp(
|
|
static_cast<int>(in_vec_size - k - simd_lid * values_per_thread),
|
|
0,
|
|
values_per_thread);
|
|
if (remaining > 0) {
|
|
load_vector_safe<T, U, values_per_thread>(x, x_thread, remaining);
|
|
|
|
for (int row = 0; row < results_per_simdgroup; row++) {
|
|
auto wl = (const device uint8_t*)(ws + row * in_vec_size_w);
|
|
const device auto* sl = scales + row * in_vec_size_g;
|
|
|
|
U s = dequantize_scale<U>(sl[0]);
|
|
result[row] +=
|
|
qdot_safe<U, values_per_thread>(wl, x_thread, s, lut, remaining);
|
|
}
|
|
}
|
|
for (int row = 0; row < results_per_simdgroup; row++) {
|
|
result[row] = simd_sum(result[row]);
|
|
if (simd_lid == 0) {
|
|
y[row] = static_cast<T>(result[row]);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
template <typename T, const int group_size, typename S>
|
|
METAL_FUNC void mxfp4_qvm_impl(
|
|
const device uint32_t* w,
|
|
const device S* scales,
|
|
const device T* x,
|
|
device T* y,
|
|
const int in_vec_size,
|
|
const int out_vec_size,
|
|
uint3 tid [[threadgroup_position_in_grid]],
|
|
uint simd_gid [[simdgroup_index_in_threadgroup]],
|
|
uint simd_lid [[thread_index_in_simdgroup]],
|
|
threadgroup float* lut) {
|
|
constexpr int num_simdgroups = 2;
|
|
constexpr int pack_factor = get_pack_factor<32>();
|
|
constexpr int bytes_per_pack = get_bytes_per_pack();
|
|
|
|
constexpr int tn = 32 / pack_factor;
|
|
constexpr int block_size = SIMD_SIZE;
|
|
|
|
using W_T = uint32_t;
|
|
const device W_T* ws = (const device W_T*)w;
|
|
|
|
typedef float U;
|
|
typedef struct {
|
|
W_T wi[tn * bytes_per_pack];
|
|
} vec_w;
|
|
|
|
thread vec_w w_local;
|
|
thread U result[tn * pack_factor] = {0};
|
|
thread U scale = 0;
|
|
thread U x_local = 0;
|
|
|
|
load_mxfp4_lut(lut, simd_gid, simd_lid);
|
|
|
|
// Adjust positions
|
|
const int out_vec_size_w = out_vec_size * bytes_per_pack / pack_factor;
|
|
const int out_vec_size_g = out_vec_size / group_size;
|
|
int out_col = pack_factor * tn * (tid.y * num_simdgroups + simd_gid);
|
|
ws += out_col * bytes_per_pack / pack_factor + simd_lid * out_vec_size_w;
|
|
scales += out_col / group_size + simd_lid * out_vec_size_g;
|
|
x += tid.x * in_vec_size + simd_lid;
|
|
y += tid.x * out_vec_size + out_col;
|
|
|
|
if (out_col >= out_vec_size) {
|
|
return;
|
|
}
|
|
|
|
// Loop over in_vec in blocks of block_size
|
|
int remaining = in_vec_size % block_size;
|
|
if (remaining == 0) {
|
|
for (int i = 0; i < in_vec_size; i += block_size) {
|
|
x_local = *x;
|
|
scale = dequantize_scale<U>(*scales);
|
|
w_local = *((device vec_w*)ws);
|
|
qouter<U, tn * pack_factor>(
|
|
(thread uint8_t*)&w_local, x_local, scale, result, lut);
|
|
|
|
x += block_size;
|
|
scales += block_size * out_vec_size_g;
|
|
ws += block_size * out_vec_size_w;
|
|
}
|
|
} else {
|
|
for (int i = block_size; i < in_vec_size; i += block_size) {
|
|
x_local = *x;
|
|
scale = dequantize_scale<U>(*scales);
|
|
w_local = *((device vec_w*)ws);
|
|
|
|
qouter<U, tn * pack_factor>(
|
|
(thread uint8_t*)&w_local, x_local, scale, result, lut);
|
|
|
|
x += block_size;
|
|
scales += block_size * out_vec_size_g;
|
|
ws += block_size * out_vec_size_w;
|
|
}
|
|
if (static_cast<int>(simd_lid) < remaining) {
|
|
x_local = *x;
|
|
scale = dequantize_scale<U>(*scales);
|
|
w_local = *((device vec_w*)ws);
|
|
} else {
|
|
x_local = 0;
|
|
scale = 0;
|
|
}
|
|
qouter<U, tn * pack_factor>(
|
|
(thread uint8_t*)&w_local, x_local, scale, result, lut);
|
|
}
|
|
|
|
// Accumulate in the simdgroup
|
|
#pragma clang loop unroll(full)
|
|
for (int k = 0; k < tn * pack_factor; k++) {
|
|
result[k] = simd_sum(result[k]);
|
|
}
|
|
|
|
// Store the result
|
|
if (simd_lid == 0) {
|
|
#pragma clang loop unroll(full)
|
|
for (int k = 0; k < tn * pack_factor; k++) {
|
|
y[k] = static_cast<T>(result[k]);
|
|
}
|
|
}
|
|
}
|
|
|
|
template <
|
|
typename T,
|
|
const int group_size,
|
|
typename S,
|
|
const bool aligned_N,
|
|
const int BM = 32,
|
|
const int BK = 32,
|
|
const int BN = 32>
|
|
METAL_FUNC void mxfp4_qmm_t_impl(
|
|
const device uint32_t* w,
|
|
const device S* scales,
|
|
const device T* x,
|
|
device T* y,
|
|
threadgroup T* Xs,
|
|
threadgroup T* Ws,
|
|
const constant int& K,
|
|
const constant int& N,
|
|
const constant int& M,
|
|
uint3 tid [[threadgroup_position_in_grid]],
|
|
uint lid [[thread_index_in_threadgroup]],
|
|
uint simd_gid [[simdgroup_index_in_threadgroup]],
|
|
uint simd_lid [[thread_index_in_simdgroup]],
|
|
threadgroup T* lut) {
|
|
static_assert(BK >= SIMD_SIZE, "BK should be larger than SIMD_SIZE");
|
|
static_assert(BK % SIMD_SIZE == 0, "BK should be divisible by SIMD_SIZE");
|
|
|
|
(void)lid;
|
|
|
|
constexpr int WM = 2;
|
|
constexpr int WN = 2;
|
|
constexpr int pack_factor = get_pack_factor<8>();
|
|
constexpr int bytes_per_pack = get_bytes_per_pack();
|
|
|
|
constexpr int BK_padded = (BK + 16 / sizeof(T));
|
|
|
|
// Instantiate the appropriate BlockMMA and Loader
|
|
using mma_t = mlx::steel::
|
|
BlockMMA<T, T, BM, BN, BK, WM, WN, false, true, BK_padded, BK_padded>;
|
|
using loader_x_t =
|
|
mlx::steel::BlockLoader<T, BM, BK, BK_padded, 1, WM * WN * SIMD_SIZE>;
|
|
using loader_w_t = QuantizedBlockLoader<
|
|
T,
|
|
BN,
|
|
BK,
|
|
BK_padded,
|
|
1,
|
|
WM * WN * SIMD_SIZE,
|
|
group_size,
|
|
S>;
|
|
|
|
// Set the block
|
|
const int K_w = K * bytes_per_pack / pack_factor;
|
|
const int K_g = K / group_size;
|
|
const int y_row = tid.y * BM;
|
|
const int y_col = tid.x * BN;
|
|
|
|
auto wl = (const device uint8_t*)w;
|
|
|
|
x += y_row * static_cast<int64_t>(K);
|
|
wl += y_col * K_w;
|
|
scales += y_col * K_g;
|
|
y += y_row * static_cast<int64_t>(N) + y_col;
|
|
|
|
// Make the x loader and mma operation
|
|
const short num_els = min(BM, M - y_row);
|
|
const short num_outs = min(BN, N - y_col);
|
|
loader_x_t loader_x(x, K, Xs, simd_gid, simd_lid);
|
|
loader_w_t loader_w(wl, scales, K, Ws, lut, simd_gid, simd_lid);
|
|
mma_t mma_op(simd_gid, simd_lid);
|
|
|
|
if (num_els < BM) {
|
|
if (!aligned_N && num_outs < BN) {
|
|
for (int k = 0; k < K; k += BK) {
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
loader_x.load_safe(short2(BK, num_els));
|
|
loader_w.load_safe(short2(BK, num_outs));
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
mma_op.mma(Xs, Ws);
|
|
loader_x.next();
|
|
loader_w.next();
|
|
}
|
|
} else {
|
|
for (int k = 0; k < K; k += BK) {
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
loader_x.load_safe(short2(BK, num_els));
|
|
loader_w.load_unsafe();
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
mma_op.mma(Xs, Ws);
|
|
loader_x.next();
|
|
loader_w.next();
|
|
}
|
|
}
|
|
} else {
|
|
if (!aligned_N && num_outs < BN) {
|
|
for (int k = 0; k < K; k += BK) {
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
loader_x.load_unsafe();
|
|
loader_w.load_safe(short2(BK, num_outs));
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
mma_op.mma(Xs, Ws);
|
|
loader_x.next();
|
|
loader_w.next();
|
|
}
|
|
} else {
|
|
for (int k = 0; k < K; k += BK) {
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
loader_x.load_unsafe();
|
|
loader_w.load_unsafe();
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
|
|
mma_op.mma(Xs, Ws);
|
|
loader_x.next();
|
|
loader_w.next();
|
|
}
|
|
}
|
|
}
|
|
|
|
// Store results to device memory
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
if (num_els < BM || num_outs < BN) {
|
|
mma_op.store_result_safe(y, N, short2(num_outs, num_els));
|
|
} else {
|
|
mma_op.store_result(y, N);
|
|
}
|
|
}
|
|
|
|
template <
|
|
typename T,
|
|
const int group_size,
|
|
typename S,
|
|
const int BM = 32,
|
|
const int BK = 32,
|
|
const int BN = 32>
|
|
METAL_FUNC void mxfp4_qmm_n_impl(
|
|
const device uint32_t* w,
|
|
const device S* scales,
|
|
const device T* x,
|
|
device T* y,
|
|
threadgroup T* Xs,
|
|
threadgroup T* Ws,
|
|
const constant int& K,
|
|
const constant int& N,
|
|
const constant int& M,
|
|
uint3 tid [[threadgroup_position_in_grid]],
|
|
uint lid [[thread_index_in_threadgroup]],
|
|
uint simd_gid [[simdgroup_index_in_threadgroup]],
|
|
uint simd_lid [[thread_index_in_simdgroup]],
|
|
threadgroup T* lut) {
|
|
static_assert(BK >= SIMD_SIZE, "BK should be larger than SIMD_SIZE");
|
|
static_assert(BK % SIMD_SIZE == 0, "BK should be divisible by SIMD_SIZE");
|
|
|
|
(void)lid;
|
|
|
|
constexpr int WM = 2;
|
|
constexpr int WN = 2;
|
|
constexpr int pack_factor = get_pack_factor<8>();
|
|
constexpr int bytes_per_pack = get_bytes_per_pack();
|
|
|
|
constexpr int BK_padded = (BK + 16 / sizeof(T));
|
|
constexpr int BN_padded = (BN + 16 / sizeof(T));
|
|
|
|
// Instantiate the appropriate BlockMMA and Loader
|
|
using mma_t = mlx::steel::
|
|
BlockMMA<T, T, BM, BN, BK, WM, WN, false, false, BK_padded, BN_padded>;
|
|
using loader_x_t = mlx::steel::
|
|
BlockLoader<T, BM, BK, BK_padded, 1, WM * WN * SIMD_SIZE, 1, 4>;
|
|
using loader_w_t = QuantizedBlockLoader<
|
|
T,
|
|
BK,
|
|
BN,
|
|
BN_padded,
|
|
0,
|
|
WM * WN * SIMD_SIZE,
|
|
group_size,
|
|
S>;
|
|
|
|
auto wl = (const device uint8_t*)w;
|
|
|
|
// Set the block
|
|
const int y_row = tid.y * BM;
|
|
const int y_col = tid.x * BN;
|
|
x += y_row * static_cast<int64_t>(K);
|
|
wl += y_col * bytes_per_pack / pack_factor;
|
|
scales += y_col / group_size;
|
|
y += y_row * static_cast<int64_t>(N) + y_col;
|
|
|
|
// Make the x loader and mma operation
|
|
const short num_els = min(BM, M - y_row);
|
|
loader_x_t loader_x(x, K, Xs, simd_gid, simd_lid);
|
|
loader_w_t loader_w(wl, scales, N, Ws, lut, simd_gid, simd_lid);
|
|
mma_t mma_op(simd_gid, simd_lid);
|
|
|
|
if (num_els < BM) {
|
|
if ((K % BK) != 0) {
|
|
const int k_blocks = K / BK;
|
|
for (int k = 0; k < k_blocks; k++) {
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
loader_x.load_safe(short2(BK, num_els));
|
|
loader_w.load_unsafe();
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
mma_op.mma(Xs, Ws);
|
|
loader_x.next();
|
|
loader_w.next();
|
|
}
|
|
const short num_k = K - k_blocks * BK;
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
loader_x.load_safe(short2(num_k, num_els));
|
|
loader_w.load_safe(short2(BN, num_k));
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
mma_op.mma(Xs, Ws);
|
|
} else {
|
|
for (int k = 0; k < K; k += BK) {
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
loader_x.load_safe(short2(BK, num_els));
|
|
loader_w.load_unsafe();
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
mma_op.mma(Xs, Ws);
|
|
loader_x.next();
|
|
loader_w.next();
|
|
}
|
|
}
|
|
} else {
|
|
if ((K % BK) != 0) {
|
|
const int k_blocks = K / BK;
|
|
for (int k = 0; k < k_blocks; k++) {
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
loader_x.load_unsafe();
|
|
loader_w.load_unsafe();
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
mma_op.mma(Xs, Ws);
|
|
loader_x.next();
|
|
loader_w.next();
|
|
}
|
|
const short num_k = K - k_blocks * BK;
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
loader_x.load_safe(short2(num_k, BM));
|
|
loader_w.load_safe(short2(BN, num_k));
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
mma_op.mma(Xs, Ws);
|
|
} else {
|
|
for (int k = 0; k < K; k += BK) {
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
loader_x.load_unsafe();
|
|
loader_w.load_unsafe();
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
mma_op.mma(Xs, Ws);
|
|
loader_x.next();
|
|
loader_w.next();
|
|
}
|
|
}
|
|
}
|
|
|
|
// Store results to device memory
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
if (num_els < BM) {
|
|
mma_op.store_result_safe(y, N, short2(BN, num_els));
|
|
} else {
|
|
mma_op.store_result(y, N);
|
|
}
|
|
}
|
|
|
|
template <typename T, typename S>
|
|
METAL_FUNC void adjust_matrix_offsets(
|
|
const device T*& x,
|
|
const device uint32_t*& w,
|
|
const device S*& scales,
|
|
device T*& y,
|
|
int output_stride,
|
|
const constant int& x_batch_ndims,
|
|
const constant int* x_shape,
|
|
const constant int64_t* x_strides,
|
|
const constant int& w_batch_ndims,
|
|
const constant int* w_shape,
|
|
const constant int64_t* w_strides,
|
|
const constant int64_t* s_strides,
|
|
uint3 tid [[threadgroup_position_in_grid]]) {
|
|
// Set the input/output matrices
|
|
uint32_t x_idx = tid.z;
|
|
uint32_t w_idx = tid.z;
|
|
if (x_batch_ndims == 1) {
|
|
x += x_idx * x_strides[0];
|
|
} else {
|
|
x += elem_to_loc(x_idx, x_shape, x_strides, x_batch_ndims);
|
|
}
|
|
if (w_batch_ndims == 1) {
|
|
w += w_idx * w_strides[0];
|
|
scales += w_idx * s_strides[0];
|
|
} else {
|
|
ulong2 idx = elem_to_loc_broadcast(
|
|
w_idx, w_shape, w_strides, s_strides, w_batch_ndims);
|
|
w += idx.x;
|
|
scales += idx.y;
|
|
}
|
|
y += tid.z * output_stride;
|
|
}
|
|
|
|
template <typename T, typename S>
|
|
METAL_FUNC void adjust_matrix_offsets(
|
|
const device T*& x,
|
|
const device uint32_t*& w,
|
|
const device S*& scales,
|
|
const device uint32_t* lhs_indices,
|
|
const device uint32_t* rhs_indices,
|
|
device T*& y,
|
|
int output_stride,
|
|
const constant int& batch_ndims,
|
|
const constant int* batch_shape,
|
|
const constant int64_t* lhs_strides,
|
|
const constant int64_t* rhs_strides,
|
|
const constant int& x_batch_ndims,
|
|
const constant int* x_shape,
|
|
const constant int64_t* x_strides,
|
|
const constant int& w_batch_ndims,
|
|
const constant int* w_shape,
|
|
const constant int64_t* w_strides,
|
|
const constant int64_t* s_strides,
|
|
uint3 tid [[threadgroup_position_in_grid]]) {
|
|
// Set the input/output matrices
|
|
uint32_t x_idx;
|
|
uint32_t w_idx;
|
|
if (batch_ndims == 1) {
|
|
x_idx = lhs_indices[tid.z * lhs_strides[0]];
|
|
w_idx = rhs_indices[tid.z * rhs_strides[0]];
|
|
} else {
|
|
ulong2 idx = elem_to_loc_broadcast(
|
|
tid.z, batch_shape, lhs_strides, rhs_strides, batch_ndims);
|
|
x_idx = lhs_indices[idx.x];
|
|
w_idx = rhs_indices[idx.y];
|
|
}
|
|
if (x_batch_ndims == 1) {
|
|
x += x_idx * x_strides[0];
|
|
} else {
|
|
x += elem_to_loc(x_idx, x_shape, x_strides, x_batch_ndims);
|
|
}
|
|
if (w_batch_ndims == 1) {
|
|
w += w_idx * w_strides[0];
|
|
scales += w_idx * s_strides[0];
|
|
} else {
|
|
ulong2 idx = elem_to_loc_broadcast(
|
|
w_idx, w_shape, w_strides, s_strides, w_batch_ndims);
|
|
w += idx.x;
|
|
scales += idx.y;
|
|
}
|
|
y += tid.z * output_stride;
|
|
}
|
|
|
|
template <typename T, int group_size, typename S, int D, bool batched>
|
|
[[kernel]] void mxfp4_qmv_quad(
|
|
const device uint32_t* w,
|
|
const device S* scales,
|
|
const device T* x,
|
|
device T* y,
|
|
const constant int& in_vec_size,
|
|
const constant int& out_vec_size,
|
|
const constant int& x_batch_ndims,
|
|
const constant int* x_shape,
|
|
const constant int64_t* x_strides,
|
|
const constant int& w_batch_ndims,
|
|
const constant int* w_shape,
|
|
const constant int64_t* w_strides,
|
|
const constant int64_t* s_strides,
|
|
uint3 tid [[threadgroup_position_in_grid]],
|
|
uint quad_gid [[quadgroup_index_in_threadgroup]],
|
|
uint quad_lid [[thread_index_in_quadgroup]],
|
|
uint simd_gid [[simdgroup_index_in_threadgroup]],
|
|
uint simd_lid [[thread_index_in_simdgroup]]) {
|
|
if (batched) {
|
|
int M = x_shape[x_batch_ndims];
|
|
adjust_matrix_offsets(
|
|
x,
|
|
w,
|
|
scales,
|
|
y,
|
|
out_vec_size * M,
|
|
x_batch_ndims,
|
|
x_shape,
|
|
x_strides,
|
|
w_batch_ndims,
|
|
w_shape,
|
|
w_strides,
|
|
s_strides,
|
|
tid);
|
|
}
|
|
threadgroup float lut[16];
|
|
mxfp4_qmv_quad_impl<T, group_size, S, D>(
|
|
w,
|
|
scales,
|
|
x,
|
|
y,
|
|
in_vec_size,
|
|
out_vec_size,
|
|
tid,
|
|
quad_gid,
|
|
quad_lid,
|
|
simd_gid,
|
|
simd_lid,
|
|
lut);
|
|
}
|
|
|
|
template <typename T, int group_size, typename S, bool batched>
|
|
[[kernel]] void mxfp4_qmv_fast(
|
|
const device uint32_t* w,
|
|
const device S* scales,
|
|
const device T* x,
|
|
device T* y,
|
|
const constant int& in_vec_size,
|
|
const constant int& out_vec_size,
|
|
const constant int& x_batch_ndims,
|
|
const constant int* x_shape,
|
|
const constant int64_t* x_strides,
|
|
const constant int& w_batch_ndims,
|
|
const constant int* w_shape,
|
|
const constant int64_t* w_strides,
|
|
const constant int64_t* s_strides,
|
|
uint3 tid [[threadgroup_position_in_grid]],
|
|
uint simd_gid [[simdgroup_index_in_threadgroup]],
|
|
uint simd_lid [[thread_index_in_simdgroup]]) {
|
|
if (batched) {
|
|
int M = x_shape[x_batch_ndims];
|
|
adjust_matrix_offsets(
|
|
x,
|
|
w,
|
|
scales,
|
|
y,
|
|
out_vec_size * M,
|
|
x_batch_ndims,
|
|
x_shape,
|
|
x_strides,
|
|
w_batch_ndims,
|
|
w_shape,
|
|
w_strides,
|
|
s_strides,
|
|
tid);
|
|
}
|
|
threadgroup float lut[16];
|
|
mxfp4_qmv_fast_impl<T, group_size>(
|
|
w, scales, x, y, in_vec_size, out_vec_size, tid, simd_gid, simd_lid, lut);
|
|
}
|
|
|
|
template <typename T, const int group_size, typename S, bool batched>
|
|
[[kernel]] void mxfp4_qmv(
|
|
const device uint32_t* w,
|
|
const device S* scales,
|
|
const device T* x,
|
|
device T* y,
|
|
const constant int& in_vec_size,
|
|
const constant int& out_vec_size,
|
|
const constant int& x_batch_ndims,
|
|
const constant int* x_shape,
|
|
const constant int64_t* x_strides,
|
|
const constant int& w_batch_ndims,
|
|
const constant int* w_shape,
|
|
const constant int64_t* w_strides,
|
|
const constant int64_t* s_strides,
|
|
uint3 tid [[threadgroup_position_in_grid]],
|
|
uint simd_gid [[simdgroup_index_in_threadgroup]],
|
|
uint simd_lid [[thread_index_in_simdgroup]]) {
|
|
if (batched) {
|
|
int M = x_shape[x_batch_ndims];
|
|
adjust_matrix_offsets(
|
|
x,
|
|
w,
|
|
scales,
|
|
y,
|
|
out_vec_size * M,
|
|
x_batch_ndims,
|
|
x_shape,
|
|
x_strides,
|
|
w_batch_ndims,
|
|
w_shape,
|
|
w_strides,
|
|
s_strides,
|
|
tid);
|
|
}
|
|
threadgroup float lut[16];
|
|
mxfp4_qmv_impl<T, group_size>(
|
|
w, scales, x, y, in_vec_size, out_vec_size, tid, simd_gid, simd_lid, lut);
|
|
}
|
|
|
|
template <typename T, const int group_size, typename S, bool batched>
|
|
[[kernel]] void mxfp4_qvm(
|
|
const device uint32_t* w,
|
|
const device S* scales,
|
|
const device T* x,
|
|
device T* y,
|
|
const constant int& in_vec_size,
|
|
const constant int& out_vec_size,
|
|
const constant int& x_batch_ndims,
|
|
const constant int* x_shape,
|
|
const constant int64_t* x_strides,
|
|
const constant int& w_batch_ndims,
|
|
const constant int* w_shape,
|
|
const constant int64_t* w_strides,
|
|
const constant int64_t* s_strides,
|
|
uint3 tid [[threadgroup_position_in_grid]],
|
|
uint simd_gid [[simdgroup_index_in_threadgroup]],
|
|
uint simd_lid [[thread_index_in_simdgroup]]) {
|
|
if (batched) {
|
|
int M = x_shape[x_batch_ndims];
|
|
adjust_matrix_offsets(
|
|
x,
|
|
w,
|
|
scales,
|
|
y,
|
|
out_vec_size * M,
|
|
x_batch_ndims,
|
|
x_shape,
|
|
x_strides,
|
|
w_batch_ndims,
|
|
w_shape,
|
|
w_strides,
|
|
s_strides,
|
|
tid);
|
|
}
|
|
threadgroup float lut[16];
|
|
mxfp4_qvm_impl<T, group_size>(
|
|
w, scales, x, y, in_vec_size, out_vec_size, tid, simd_gid, simd_lid, lut);
|
|
}
|
|
|
|
template <typename T, const int group_size, typename S, int split_k = 32>
|
|
[[kernel]] void mxfp4_qvm_split_k(
|
|
const device uint32_t* w,
|
|
const device S* scales,
|
|
const device T* x,
|
|
device T* y,
|
|
const constant int& in_vec_size,
|
|
const constant int& out_vec_size,
|
|
const constant int& x_batch_ndims,
|
|
const constant int* x_shape,
|
|
const constant int64_t* x_strides,
|
|
const constant int& w_batch_ndims,
|
|
const constant int* w_shape,
|
|
const constant int64_t* w_strides,
|
|
const constant int64_t* s_strides,
|
|
const constant int& final_block_size,
|
|
uint3 tid [[threadgroup_position_in_grid]],
|
|
uint simd_gid [[simdgroup_index_in_threadgroup]],
|
|
uint simd_lid [[thread_index_in_simdgroup]]) {
|
|
int M = x_shape[x_batch_ndims];
|
|
adjust_matrix_offsets(
|
|
x,
|
|
w,
|
|
scales,
|
|
y,
|
|
out_vec_size * M,
|
|
x_batch_ndims,
|
|
x_shape,
|
|
x_strides,
|
|
w_batch_ndims,
|
|
w_shape,
|
|
w_strides,
|
|
s_strides,
|
|
tid);
|
|
|
|
// When (in_vec_size % split_k != 0) the final block needs to be smaller
|
|
int in_vec_size_adj =
|
|
tid.z % split_k == split_k - 1 ? final_block_size : in_vec_size;
|
|
|
|
threadgroup float lut[16];
|
|
mxfp4_qvm_impl<T, group_size>(
|
|
w,
|
|
scales,
|
|
x,
|
|
y,
|
|
in_vec_size_adj,
|
|
out_vec_size,
|
|
tid,
|
|
simd_gid,
|
|
simd_lid,
|
|
lut);
|
|
}
|
|
|
|
template <
|
|
typename T,
|
|
const int group_size,
|
|
typename S,
|
|
const bool aligned_N,
|
|
const bool batched,
|
|
const int BM = 32,
|
|
const int BK = 32,
|
|
const int BN = 32>
|
|
[[kernel]] void mxfp4_qmm_t(
|
|
const device uint32_t* w,
|
|
const device S* scales,
|
|
const device T* x,
|
|
device T* y,
|
|
const constant int& K,
|
|
const constant int& N,
|
|
const constant int& M,
|
|
const constant int& x_batch_ndims,
|
|
const constant int* x_shape,
|
|
const constant int64_t* x_strides,
|
|
const constant int& w_batch_ndims,
|
|
const constant int* w_shape,
|
|
const constant int64_t* w_strides,
|
|
const constant int64_t* s_strides,
|
|
uint3 tid [[threadgroup_position_in_grid]],
|
|
uint lid [[thread_index_in_threadgroup]],
|
|
uint simd_gid [[simdgroup_index_in_threadgroup]],
|
|
uint simd_lid [[thread_index_in_simdgroup]]) {
|
|
(void)lid;
|
|
|
|
constexpr int BK_padded = (BK + 16 / sizeof(T));
|
|
|
|
threadgroup T Xs[BM * BK_padded];
|
|
threadgroup T Ws[BN * BK_padded];
|
|
threadgroup T lut[16];
|
|
|
|
if (batched) {
|
|
adjust_matrix_offsets(
|
|
x,
|
|
w,
|
|
scales,
|
|
y,
|
|
M * N,
|
|
x_batch_ndims,
|
|
x_shape,
|
|
x_strides,
|
|
w_batch_ndims,
|
|
w_shape,
|
|
w_strides,
|
|
s_strides,
|
|
tid);
|
|
}
|
|
mxfp4_qmm_t_impl<T, group_size, S, aligned_N, BM, BK, BN>(
|
|
w, scales, x, y, Xs, Ws, K, N, M, tid, lid, simd_gid, simd_lid, lut);
|
|
}
|
|
|
|
template <
|
|
typename T,
|
|
const int group_size,
|
|
typename S,
|
|
const bool batched,
|
|
const int BM = 32,
|
|
const int BK = 32,
|
|
const int BN = 32>
|
|
[[kernel]] void mxfp4_qmm_n(
|
|
const device uint32_t* w,
|
|
const device S* scales,
|
|
const device T* x,
|
|
device T* y,
|
|
const constant int& K,
|
|
const constant int& N,
|
|
const constant int& M,
|
|
const constant int& x_batch_ndims,
|
|
const constant int* x_shape,
|
|
const constant int64_t* x_strides,
|
|
const constant int& w_batch_ndims,
|
|
const constant int* w_shape,
|
|
const constant int64_t* w_strides,
|
|
const constant int64_t* s_strides,
|
|
uint3 tid [[threadgroup_position_in_grid]],
|
|
uint lid [[thread_index_in_threadgroup]],
|
|
uint simd_gid [[simdgroup_index_in_threadgroup]],
|
|
uint simd_lid [[thread_index_in_simdgroup]]) {
|
|
(void)lid;
|
|
|
|
constexpr int BK_padded = (BK + 16 / sizeof(T));
|
|
constexpr int BN_padded = (BN + 16 / sizeof(T));
|
|
|
|
threadgroup T Xs[BM * BK_padded];
|
|
threadgroup T Ws[BK * BN_padded];
|
|
threadgroup T lut[16];
|
|
|
|
if (batched) {
|
|
adjust_matrix_offsets(
|
|
x,
|
|
w,
|
|
scales,
|
|
y,
|
|
M * N,
|
|
x_batch_ndims,
|
|
x_shape,
|
|
x_strides,
|
|
w_batch_ndims,
|
|
w_shape,
|
|
w_strides,
|
|
s_strides,
|
|
tid);
|
|
}
|
|
|
|
mxfp4_qmm_n_impl<T, group_size, S, BM, BK, BN>(
|
|
w, scales, x, y, Xs, Ws, K, N, M, tid, lid, simd_gid, simd_lid, lut);
|
|
}
|
|
|
|
template <typename T, int group_size, typename S>
|
|
[[kernel]] void mxfp4_gather_qmv_fast(
|
|
const device uint32_t* w,
|
|
const device S* scales,
|
|
const device T* x,
|
|
const device uint32_t* lhs_indices,
|
|
const device uint32_t* rhs_indices,
|
|
device T* y,
|
|
const constant int& in_vec_size,
|
|
const constant int& out_vec_size,
|
|
const constant int& x_batch_ndims,
|
|
const constant int* x_shape,
|
|
const constant int64_t* x_strides,
|
|
const constant int& w_batch_ndims,
|
|
const constant int* w_shape,
|
|
const constant int64_t* w_strides,
|
|
const constant int64_t* s_strides,
|
|
const constant int& batch_ndims,
|
|
const constant int* batch_shape,
|
|
const constant int64_t* lhs_strides,
|
|
const constant int64_t* rhs_strides,
|
|
uint3 tid [[threadgroup_position_in_grid]],
|
|
uint simd_gid [[simdgroup_index_in_threadgroup]],
|
|
uint simd_lid [[thread_index_in_simdgroup]]) {
|
|
int M = x_shape[x_batch_ndims];
|
|
adjust_matrix_offsets(
|
|
x,
|
|
w,
|
|
scales,
|
|
lhs_indices,
|
|
rhs_indices,
|
|
y,
|
|
out_vec_size * M,
|
|
batch_ndims,
|
|
batch_shape,
|
|
lhs_strides,
|
|
rhs_strides,
|
|
x_batch_ndims,
|
|
x_shape,
|
|
x_strides,
|
|
w_batch_ndims,
|
|
w_shape,
|
|
w_strides,
|
|
s_strides,
|
|
tid);
|
|
threadgroup float lut[16];
|
|
mxfp4_qmv_fast_impl<T, group_size>(
|
|
w, scales, x, y, in_vec_size, out_vec_size, tid, simd_gid, simd_lid, lut);
|
|
}
|
|
|
|
template <typename T, int group_size, typename S>
|
|
[[kernel]] void mxfp4_gather_qmv(
|
|
const device uint32_t* w,
|
|
const device S* scales,
|
|
const device T* x,
|
|
const device uint32_t* lhs_indices,
|
|
const device uint32_t* rhs_indices,
|
|
device T* y,
|
|
const constant int& in_vec_size,
|
|
const constant int& out_vec_size,
|
|
const constant int& x_batch_ndims,
|
|
const constant int* x_shape,
|
|
const constant int64_t* x_strides,
|
|
const constant int& w_batch_ndims,
|
|
const constant int* w_shape,
|
|
const constant int64_t* w_strides,
|
|
const constant int64_t* s_strides,
|
|
const constant int& batch_ndims,
|
|
const constant int* batch_shape,
|
|
const constant int64_t* lhs_strides,
|
|
const constant int64_t* rhs_strides,
|
|
uint3 tid [[threadgroup_position_in_grid]],
|
|
uint simd_gid [[simdgroup_index_in_threadgroup]],
|
|
uint simd_lid [[thread_index_in_simdgroup]]) {
|
|
int M = x_shape[x_batch_ndims];
|
|
adjust_matrix_offsets(
|
|
x,
|
|
w,
|
|
scales,
|
|
lhs_indices,
|
|
rhs_indices,
|
|
y,
|
|
out_vec_size * M,
|
|
batch_ndims,
|
|
batch_shape,
|
|
lhs_strides,
|
|
rhs_strides,
|
|
x_batch_ndims,
|
|
x_shape,
|
|
x_strides,
|
|
w_batch_ndims,
|
|
w_shape,
|
|
w_strides,
|
|
s_strides,
|
|
tid);
|
|
threadgroup float lut[16];
|
|
mxfp4_qmv_impl<T, group_size>(
|
|
w, scales, x, y, in_vec_size, out_vec_size, tid, simd_gid, simd_lid, lut);
|
|
}
|
|
|
|
template <typename T, int group_size, typename S>
|
|
[[kernel]] void mxfp4_gather_qvm(
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const device uint32_t* w,
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const device S* scales,
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const device T* x,
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const device uint32_t* lhs_indices,
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const device uint32_t* rhs_indices,
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device T* y,
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const constant int& in_vec_size,
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const constant int& out_vec_size,
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const constant int& x_batch_ndims,
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const constant int* x_shape,
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const constant int64_t* x_strides,
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const constant int& w_batch_ndims,
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const constant int* w_shape,
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const constant int64_t* w_strides,
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const constant int64_t* s_strides,
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const constant int& batch_ndims,
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const constant int* batch_shape,
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const constant int64_t* lhs_strides,
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const constant int64_t* rhs_strides,
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uint3 tid [[threadgroup_position_in_grid]],
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uint simd_gid [[simdgroup_index_in_threadgroup]],
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uint simd_lid [[thread_index_in_simdgroup]]) {
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int M = x_shape[x_batch_ndims];
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adjust_matrix_offsets(
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x,
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w,
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scales,
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lhs_indices,
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rhs_indices,
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y,
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out_vec_size * M,
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batch_ndims,
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batch_shape,
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lhs_strides,
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rhs_strides,
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x_batch_ndims,
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x_shape,
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x_strides,
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w_batch_ndims,
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w_shape,
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w_strides,
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s_strides,
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tid);
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threadgroup float lut[16];
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mxfp4_qvm_impl<T, group_size>(
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w, scales, x, y, in_vec_size, out_vec_size, tid, simd_gid, simd_lid, lut);
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}
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template <
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typename T,
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const int group_size,
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typename S,
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const bool aligned_N,
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const int BM = 32,
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const int BK = 32,
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const int BN = 32>
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[[kernel]] void mxfp4_gather_qmm_t(
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const device uint32_t* w,
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const device S* scales,
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const device T* x,
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const device uint32_t* lhs_indices,
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const device uint32_t* rhs_indices,
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device T* y,
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const constant int& K,
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const constant int& N,
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const constant int& M,
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const constant int& x_batch_ndims,
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const constant int* x_shape,
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const constant int64_t* x_strides,
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const constant int& w_batch_ndims,
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const constant int* w_shape,
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const constant int64_t* w_strides,
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const constant int64_t* s_strides,
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const constant int& batch_ndims,
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const constant int* batch_shape,
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const constant int64_t* lhs_strides,
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const constant int64_t* rhs_strides,
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uint3 tid [[threadgroup_position_in_grid]],
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uint lid [[thread_index_in_threadgroup]],
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uint simd_gid [[simdgroup_index_in_threadgroup]],
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uint simd_lid [[thread_index_in_simdgroup]]) {
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(void)lid;
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constexpr int BK_padded = (BK + 16 / sizeof(T));
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threadgroup T Xs[BM * BK_padded];
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threadgroup T Ws[BN * BK_padded];
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threadgroup T lut[16];
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adjust_matrix_offsets(
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x,
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w,
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scales,
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lhs_indices,
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rhs_indices,
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y,
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M * N,
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batch_ndims,
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batch_shape,
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lhs_strides,
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rhs_strides,
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x_batch_ndims,
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|
x_shape,
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|
x_strides,
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w_batch_ndims,
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w_shape,
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w_strides,
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s_strides,
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tid);
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mxfp4_qmm_t_impl<T, group_size, S, aligned_N, BM, BK, BN>(
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w, scales, x, y, Xs, Ws, K, N, M, tid, lid, simd_gid, simd_lid, lut);
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}
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template <
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typename T,
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const int group_size,
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typename S,
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const int BM = 32,
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const int BK = 32,
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const int BN = 32>
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[[kernel]] void mxfp4_gather_qmm_n(
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const device uint32_t* w,
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const device S* scales,
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const device T* x,
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const device uint32_t* lhs_indices,
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const device uint32_t* rhs_indices,
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device T* y,
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const constant int& K,
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const constant int& N,
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const constant int& M,
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const constant int& x_batch_ndims,
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const constant int* x_shape,
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const constant int64_t* x_strides,
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const constant int& w_batch_ndims,
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const constant int* w_shape,
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const constant int64_t* w_strides,
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const constant int64_t* s_strides,
|
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const constant int& batch_ndims,
|
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const constant int* batch_shape,
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const constant int64_t* lhs_strides,
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const constant int64_t* rhs_strides,
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uint3 tid [[threadgroup_position_in_grid]],
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uint lid [[thread_index_in_threadgroup]],
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uint simd_gid [[simdgroup_index_in_threadgroup]],
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uint simd_lid [[thread_index_in_simdgroup]]) {
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(void)lid;
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|
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constexpr int BK_padded = (BK + 16 / sizeof(T));
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constexpr int BN_padded = (BN + 16 / sizeof(T));
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|
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threadgroup T Xs[BM * BK_padded];
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threadgroup T Ws[BK * BN_padded];
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threadgroup T lut[16];
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|
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|
adjust_matrix_offsets(
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x,
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|
w,
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|
scales,
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|
lhs_indices,
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|
rhs_indices,
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y,
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M * N,
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batch_ndims,
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batch_shape,
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|
lhs_strides,
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|
rhs_strides,
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|
x_batch_ndims,
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|
x_shape,
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|
x_strides,
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|
w_batch_ndims,
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w_shape,
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w_strides,
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s_strides,
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tid);
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mxfp4_qmm_n_impl<T, group_size, S, BM, BK, BN>(
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w, scales, x, y, Xs, Ws, K, N, M, tid, lid, simd_gid, simd_lid, lut);
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}
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|
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|
template <
|
|
typename T,
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|
int group_size,
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typename S,
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int BM,
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int BN,
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int BK,
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int WM,
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int WN,
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bool transpose>
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[[kernel]] void mxfp4_gather_qmm_rhs(
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const device T* x,
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const device uint32_t* w,
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const device S* scales,
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const device uint32_t* indices,
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|
device T* y,
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const constant int& M,
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const constant int& N,
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const constant int& K,
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uint3 tid [[threadgroup_position_in_grid]],
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uint simd_group_id [[simdgroup_index_in_threadgroup]],
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uint simd_lane_id [[thread_index_in_simdgroup]]) {
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constexpr int pack_factor = get_pack_factor<8>();
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constexpr int bytes_per_pack = get_bytes_per_pack();
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|
constexpr int BK_padded = (BK + 16 / sizeof(T));
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constexpr int BN_padded = (BN + 16 / sizeof(T));
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|
threadgroup T lut[16];
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|
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using mma_t = mlx::steel::BlockMMA<
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T,
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|
T,
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BM,
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BN,
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|
BK,
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|
WM,
|
|
WN,
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|
false,
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transpose,
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|
BK_padded,
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transpose ? BK_padded : BN_padded>;
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using loader_x_t =
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mlx::steel::BlockLoader<T, BM, BK, BK_padded, 1, WM * WN * SIMD_SIZE>;
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using loader_w_t = QuantizedBlockLoader<
|
|
T,
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transpose ? BN : BK,
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transpose ? BK : BN,
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|
transpose ? BK_padded : BN_padded,
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|
transpose,
|
|
WM * WN * SIMD_SIZE,
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group_size,
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|
S>;
|
|
|
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threadgroup T Xs[BM * BK_padded];
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|
threadgroup T Ws[transpose ? BN * BK_padded : BK * BN_padded];
|
|
|
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// Compute the block
|
|
const int K_w = K * bytes_per_pack / pack_factor;
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|
const int K_g = K / group_size;
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const int N_w = N * bytes_per_pack / pack_factor;
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const int N_g = N / group_size;
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const int K_it = K / BK;
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const size_t stride_w = transpose ? N * K_w : K * N_w;
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|
const size_t stride_s = transpose ? N * K_g : K * N_g;
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const int y_row = tid.y * BM;
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const int y_col = tid.x * BN;
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|
const size_t y_row_long = size_t(y_row);
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|
const size_t y_col_long = size_t(y_col);
|
|
|
|
// Prepare threadgroup bounds
|
|
const short tgp_bm = align_M ? BM : short(min(BM, M - y_row));
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|
const short tgp_bn = align_N ? BN : short(min(BN, N - y_col));
|
|
|
|
// Calculate the final tiles in the case that K is not aligned
|
|
const int k_remain = K - K_it * BK;
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|
const short2 tile_x = short2(k_remain, tgp_bm);
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|
const short2 tile_w =
|
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transpose ? short2(k_remain, tgp_bn) : short2(tgp_bn, k_remain);
|
|
|
|
// Move x and output to the correct block
|
|
auto wl = (const device uint8_t*)w;
|
|
x += y_row_long * K;
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|
y += y_row_long * N + y_col_long;
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|
wl += transpose ? y_col_long * K_w : y_col * bytes_per_pack / pack_factor;
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|
scales += transpose ? y_col_long * K_g : y_col / group_size;
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|
|
|
// Do as many matmuls as necessary
|
|
uint32_t index;
|
|
short offset;
|
|
uint32_t index_next = indices[y_row];
|
|
short offset_next = 0;
|
|
int n = 0;
|
|
while (n < tgp_bm) {
|
|
n++;
|
|
offset = offset_next;
|
|
index = index_next;
|
|
offset_next = tgp_bm;
|
|
for (; n < tgp_bm; n++) {
|
|
if (indices[y_row + n] != index) {
|
|
offset_next = n;
|
|
index_next = indices[y_row + n];
|
|
break;
|
|
}
|
|
}
|
|
threadgroup_barrier(mem_flags::mem_none);
|
|
|
|
// Prepare threadgroup mma operation
|
|
thread mma_t mma_op(simd_group_id, simd_lane_id);
|
|
|
|
// Prepare threadgroup loading operations
|
|
thread loader_x_t loader_x(x, K, Xs, simd_group_id, simd_lane_id);
|
|
thread loader_w_t loader_w(
|
|
wl + index * stride_w,
|
|
scales + index * stride_s,
|
|
transpose ? K : N,
|
|
Ws,
|
|
lut,
|
|
simd_group_id,
|
|
simd_lane_id);
|
|
|
|
// Matrices are all aligned check nothing
|
|
if (align_M && align_N) {
|
|
gemm_loop_aligned(Xs, Ws, mma_op, loader_x, loader_w, K_it);
|
|
if (!align_K) {
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
gemm_loop_finalize(Xs, Ws, mma_op, loader_x, loader_w, tile_x, tile_w);
|
|
}
|
|
|
|
// Store results to device memory
|
|
if (offset_next - offset == BM) {
|
|
mma_op.store_result(y, N);
|
|
} else {
|
|
mma_op.store_result_slice(
|
|
y, N, short2(0, offset), short2(BN, offset_next));
|
|
}
|
|
} else {
|
|
// Tile aligned so check outside of the hot loop
|
|
if ((align_M || tgp_bm == BM) && (align_N || tgp_bn == BN)) {
|
|
gemm_loop_aligned(Xs, Ws, mma_op, loader_x, loader_w, K_it);
|
|
if (!align_K) {
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
gemm_loop_finalize(
|
|
Xs, Ws, mma_op, loader_x, loader_w, tile_x, tile_w);
|
|
}
|
|
|
|
// Store results to device memory
|
|
if (offset_next - offset == BM) {
|
|
mma_op.store_result(y, N);
|
|
} else {
|
|
mma_op.store_result_slice(
|
|
y, N, short2(0, offset), short2(BN, offset_next));
|
|
}
|
|
}
|
|
|
|
// Tile partially aligned check rows
|
|
else if (align_N || tgp_bn == BN) {
|
|
gemm_loop_unaligned<false, true, transpose>(
|
|
Xs, Ws, mma_op, loader_x, loader_w, K_it, tgp_bm, tgp_bn, BK);
|
|
if (!align_K) {
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
gemm_loop_finalize(
|
|
Xs, Ws, mma_op, loader_x, loader_w, tile_x, tile_w);
|
|
}
|
|
mma_op.store_result_slice(
|
|
y, N, short2(0, offset), short2(BN, offset_next));
|
|
}
|
|
|
|
// Tile partially aligned check cols
|
|
else if (align_M || tgp_bm == BM) {
|
|
gemm_loop_unaligned<true, false, transpose>(
|
|
Xs, Ws, mma_op, loader_x, loader_w, K_it, tgp_bm, tgp_bn, BK);
|
|
if (!align_K) {
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
gemm_loop_finalize(
|
|
Xs, Ws, mma_op, loader_x, loader_w, tile_x, tile_w);
|
|
}
|
|
mma_op.store_result_slice(
|
|
y, N, short2(0, offset), short2(tgp_bn, offset_next));
|
|
}
|
|
|
|
// Nothing aligned so check both rows and cols
|
|
else {
|
|
gemm_loop_unaligned<false, false, transpose>(
|
|
Xs, Ws, mma_op, loader_x, loader_w, K_it, tgp_bm, tgp_bn, BK);
|
|
if (!align_K) {
|
|
threadgroup_barrier(mem_flags::mem_threadgroup);
|
|
gemm_loop_finalize(
|
|
Xs, Ws, mma_op, loader_x, loader_w, tile_x, tile_w);
|
|
}
|
|
mma_op.store_result_slice(
|
|
y, N, short2(0, offset), short2(tgp_bn, offset_next));
|
|
}
|
|
}
|
|
}
|
|
}
|