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Make archspec a vendored dependency (#19600)

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- Added archspec to the list of vendored dependencies
- Removed every reference to llnl.util.cpu
- Removed tests from Spack code base
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Massimiliano Culpo 2020-10-30 21:02:14 +01:00 committed by GitHub
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51 changed files with 1892 additions and 1570 deletions
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"""This module contains the following external, potentially separately
licensed, packages that are included in Spack:
archspec
--------
* Homepage: https://pypi.python.org/pypi/archspec
* Usage: Labeling, comparison and detection of microarchitectures
* Version: 0.1.2 (commit 6e1b6502bb0a743d44a5eed7cfbbb84b4b817c43)
argparse
--------

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Intellectual Property Notice
------------------------------
Archspec is licensed under the Apache License, Version 2.0 (LICENSE-APACHE
or http://www.apache.org/licenses/LICENSE-2.0) or the MIT license,
(LICENSE-MIT or http://opensource.org/licenses/MIT), at your option.
Copyrights and patents in the Archspec project are retained by contributors.
No copyright assignment is required to contribute to Archspec.
SPDX usage
------------
Individual files contain SPDX tags instead of the full license text.
This enables machine processing of license information based on the SPDX
License Identifiers that are available here: https://spdx.org/licenses/
Files that are dual-licensed as Apache-2.0 OR MIT contain the following
text in the license header:
SPDX-License-Identifier: (Apache-2.0 OR MIT)

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Copyright 2019-2020 Lawrence Livermore National Security, LLC and other
Archspec Project Developers. See the top-level COPYRIGHT file for details.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.

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[![](https://github.com/archspec/archspec/workflows/Unit%20tests/badge.svg)](https://github.com/archspec/archspec/actions)
[![codecov](https://codecov.io/gh/archspec/archspec/branch/master/graph/badge.svg)](https://codecov.io/gh/archspec/archspec)
[![Documentation Status](https://readthedocs.org/projects/archspec/badge/?version=latest)](https://archspec.readthedocs.io/en/latest/?badge=latest)
# Archspec (Python bindings)
Archspec aims at providing a standard set of human-understandable labels for
various aspects of a system architecture like CPU, network fabrics, etc. and
APIs to detect, query and compare them.
This project grew out of [Spack](https://spack.io/) and is currently under
active development. At present it supports APIs to detect and model
compatibility relationships among different CPU microarchitectures.
## Getting started with development
The `archspec` Python package needs [poetry](https://python-poetry.org/) to
be installed from VCS sources. The preferred method to install it is via
its custom installer outside of any virtual environment:
```console
$ curl -sSL https://raw.githubusercontent.com/python-poetry/poetry/master/get-poetry.py | python
```
You can refer to [Poetry's documentation](https://python-poetry.org/docs/#installation)
for further details or for other methods to install this tool. You'll also need `tox`
to run unit test:
```console
$ pip install --user tox
```
Finally you'll need to clone the repository:
```console
$ git clone --recursive https://github.com/archspec/archspec.git
```
### Running unit tests
Once you have your environment ready you can run `archspec` unit tests
using ``tox`` from the root of the repository:
```console
$ tox
[ ... ]
py27: commands succeeded
py35: commands succeeded
py36: commands succeeded
py37: commands succeeded
py38: commands succeeded
pylint: commands succeeded
flake8: commands succeeded
black: commands succeeded
congratulations :)
```
## License
Archspec is distributed under the terms of both the MIT license and the
Apache License (Version 2.0). Users may choose either license, at their
option.
All new contributions must be made under both the MIT and Apache-2.0
licenses.
See [LICENSE-MIT](https://github.com/archspec/archspec/blob/master/LICENSE-MIT),
[LICENSE-APACHE](https://github.com/archspec/archspec/blob/master/LICENSE-APACHE),
[COPYRIGHT](https://github.com/archspec/archspec/blob/master/COPYRIGHT), and
[NOTICE](https://github.com/archspec/archspec/blob/master/NOTICE) for details.
SPDX-License-Identifier: (Apache-2.0 OR MIT)
LLNL-CODE-811653

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"""Init file to avoid namespace packages"""
__version__ = "0.1.1"

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# Copyright 2019-2020 Lawrence Livermore National Security, LLC and other
# Archspec Project Developers. See the top-level COPYRIGHT file for details.
#
# SPDX-License-Identifier: (Apache-2.0 OR MIT)
"""
archspec command line interface
"""
import click
import archspec
import archspec.cpu
@click.group(name="archspec")
@click.version_option(version=archspec.__version__)
def main():
"""archspec command line interface"""
@main.command()
def cpu():
"""archspec command line interface for CPU"""
click.echo(archspec.cpu.host())

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# Copyright 2019-2020 Lawrence Livermore National Security, LLC and other
# Archspec Project Developers. See the top-level COPYRIGHT file for details.
#
# SPDX-License-Identifier: (Apache-2.0 OR MIT)
"""The "cpu" package permits to query and compare different
CPU microarchitectures.
"""
from .microarchitecture import Microarchitecture, UnsupportedMicroarchitecture
from .microarchitecture import TARGETS, generic_microarchitecture
from .microarchitecture import version_components
from .detect import host
__all__ = [
"Microarchitecture",
"UnsupportedMicroarchitecture",
"TARGETS",
"generic_microarchitecture",
"host",
"version_components",
]

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# Copyright 2019-2020 Lawrence Livermore National Security, LLC and other
# Archspec Project Developers. See the top-level COPYRIGHT file for details.
#
# SPDX-License-Identifier: (Apache-2.0 OR MIT)
"""Aliases for microarchitecture features."""
# pylint: disable=useless-object-inheritance
from .schema import TARGETS_JSON, LazyDictionary
_FEATURE_ALIAS_PREDICATE = {}
class FeatureAliasTest(object):
"""A test that must be passed for a feature alias to succeed.
Args:
rules (dict): dictionary of rules to be met. Each key must be a
valid alias predicate
"""
# pylint: disable=too-few-public-methods
def __init__(self, rules):
self.rules = rules
self.predicates = []
for name, args in rules.items():
self.predicates.append(_FEATURE_ALIAS_PREDICATE[name](args))
def __call__(self, microarchitecture):
return all(feature_test(microarchitecture) for feature_test in self.predicates)
def _feature_aliases():
"""Returns the dictionary of all defined feature aliases."""
json_data = TARGETS_JSON["feature_aliases"]
aliases = {}
for alias, rules in json_data.items():
aliases[alias] = FeatureAliasTest(rules)
return aliases
FEATURE_ALIASES = LazyDictionary(_feature_aliases)
def alias_predicate(func):
"""Decorator to register a predicate that can be used to evaluate
feature aliases.
"""
name = func.__name__
# Check we didn't register anything else with the same name
if name in _FEATURE_ALIAS_PREDICATE:
msg = 'the alias predicate "{0}" already exists'.format(name)
raise KeyError(msg)
_FEATURE_ALIAS_PREDICATE[name] = func
return func
@alias_predicate
def reason(_):
"""This predicate returns always True and it's there to allow writing
a documentation string in the JSON file to explain why an alias is needed.
"""
return lambda x: True
@alias_predicate
def any_of(list_of_features):
"""Returns a predicate that is True if any of the feature in the
list is in the microarchitecture being tested, False otherwise.
"""
def _impl(microarchitecture):
return any(x in microarchitecture for x in list_of_features)
return _impl
@alias_predicate
def families(list_of_families):
"""Returns a predicate that is True if the architecture family of
the microarchitecture being tested is in the list, False otherwise.
"""
def _impl(microarchitecture):
return str(microarchitecture.family) in list_of_families
return _impl

148
lib/spack/llnl/util/cpu/detect.py → lib/spack/external/archspec/cpu/detect.py vendored
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@ -1,7 +1,8 @@
# Copyright 2013-2020 Lawrence Livermore National Security, LLC and other
# Spack Project Developers. See the top-level COPYRIGHT file for details.
# Copyright 2019-2020 Lawrence Livermore National Security, LLC and other
# Archspec Project Developers. See the top-level COPYRIGHT file for details.
#
# SPDX-License-Identifier: (Apache-2.0 OR MIT)
"""Detection of CPU microarchitectures"""
import collections
import functools
import os
@ -12,16 +13,16 @@
import six
from .microarchitecture import generic_microarchitecture, targets
from .schema import targets_json
from .microarchitecture import generic_microarchitecture, TARGETS
from .schema import TARGETS_JSON
#: Mapping from operating systems to chain of commands
#: to obtain a dictionary of raw info on the current cpu
info_factory = collections.defaultdict(list)
INFO_FACTORY = collections.defaultdict(list)
#: Mapping from micro-architecture families (x86_64, ppc64le, etc.) to
#: functions checking the compatibility of the host with a given target
compatibility_checks = {}
COMPATIBILITY_CHECKS = {}
def info_dict(operating_system):
@ -32,8 +33,9 @@ def info_dict(operating_system):
operating_system (str or tuple): operating system for which the marked
function is a viable factory of raw info dictionaries.
"""
def decorator(factory):
info_factory[operating_system].append(factory)
INFO_FACTORY[operating_system].append(factory)
@functools.wraps(factory)
def _impl():
@ -41,10 +43,10 @@ def _impl():
# Check that info contains a few mandatory fields
msg = 'field "{0}" is missing from raw info dictionary'
assert 'vendor_id' in info, msg.format('vendor_id')
assert 'flags' in info, msg.format('flags')
assert 'model' in info, msg.format('model')
assert 'model_name' in info, msg.format('model_name')
assert "vendor_id" in info, msg.format("vendor_id")
assert "flags" in info, msg.format("flags")
assert "model" in info, msg.format("model")
assert "model_name" in info, msg.format("model_name")
return info
@ -53,15 +55,15 @@ def _impl():
return decorator
@info_dict(operating_system='Linux')
@info_dict(operating_system="Linux")
def proc_cpuinfo():
"""Returns a raw info dictionary by parsing the first entry of
``/proc/cpuinfo``
"""
info = {}
with open('/proc/cpuinfo') as file:
with open("/proc/cpuinfo") as file:
for line in file:
key, separator, value = line.partition(':')
key, separator, value = line.partition(":")
# If there's no separator and info was already populated
# according to what's written here:
@ -70,44 +72,43 @@ def proc_cpuinfo():
#
# we are on a blank line separating two cpus. Exit early as
# we want to read just the first entry in /proc/cpuinfo
if separator != ':' and info:
if separator != ":" and info:
break
info[key.strip()] = value.strip()
return info
def check_output(args, env):
output = subprocess.Popen(
args, stdout=subprocess.PIPE, env=env
).communicate()[0]
return six.text_type(output.decode('utf-8'))
def _check_output(args, env):
output = subprocess.Popen(args, stdout=subprocess.PIPE, env=env).communicate()[0]
return six.text_type(output.decode("utf-8"))
@info_dict(operating_system='Darwin')
@info_dict(operating_system="Darwin")
def sysctl_info_dict():
"""Returns a raw info dictionary parsing the output of sysctl."""
# Make sure that /sbin and /usr/sbin are in PATH as sysctl is
# usually found there
child_environment = dict(os.environ.items())
search_paths = child_environment.get('PATH', '').split(os.pathsep)
for additional_path in ('/sbin', '/usr/sbin'):
search_paths = child_environment.get("PATH", "").split(os.pathsep)
for additional_path in ("/sbin", "/usr/sbin"):
if additional_path not in search_paths:
search_paths.append(additional_path)
child_environment['PATH'] = os.pathsep.join(search_paths)
child_environment["PATH"] = os.pathsep.join(search_paths)
def sysctl(*args):
return check_output(
['sysctl'] + list(args), env=child_environment
).strip()
return _check_output(["sysctl"] + list(args), env=child_environment).strip()
flags = (sysctl('-n', 'machdep.cpu.features').lower() + ' '
+ sysctl('-n', 'machdep.cpu.leaf7_features').lower())
flags = (
sysctl("-n", "machdep.cpu.features").lower()
+ " "
+ sysctl("-n", "machdep.cpu.leaf7_features").lower()
)
info = {
'vendor_id': sysctl('-n', 'machdep.cpu.vendor'),
'flags': flags,
'model': sysctl('-n', 'machdep.cpu.model'),
'model name': sysctl('-n', 'machdep.cpu.brand_string')
"vendor_id": sysctl("-n", "machdep.cpu.vendor"),
"flags": flags,
"model": sysctl("-n", "machdep.cpu.model"),
"model name": sysctl("-n", "machdep.cpu.brand_string"),
}
return info
@ -117,16 +118,16 @@ def adjust_raw_flags(info):
slightly different representations.
"""
# Flags detected on Darwin turned to their linux counterpart
flags = info.get('flags', [])
d2l = targets_json['conversions']['darwin_flags']
flags = info.get("flags", [])
d2l = TARGETS_JSON["conversions"]["darwin_flags"]
for darwin_flag, linux_flag in d2l.items():
if darwin_flag in flags:
info['flags'] += ' ' + linux_flag
info["flags"] += " " + linux_flag
def adjust_raw_vendor(info):
"""Adjust the vendor field to make it human readable"""
if 'CPU implementer' not in info:
if "CPU implementer" not in info:
return
# Mapping numeric codes to vendor (ARM). This list is a merge from
@ -136,10 +137,10 @@ def adjust_raw_vendor(info):
# https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile
# https://github.com/gcc-mirror/gcc/blob/master/gcc/config/aarch64/aarch64-cores.def
# https://patchwork.kernel.org/patch/10524949/
arm_vendors = targets_json['conversions']['arm_vendors']
arm_code = info['CPU implementer']
arm_vendors = TARGETS_JSON["conversions"]["arm_vendors"]
arm_code = info["CPU implementer"]
if arm_code in arm_vendors:
info['CPU implementer'] = arm_vendors[arm_code]
info["CPU implementer"] = arm_vendors[arm_code]
def raw_info_dictionary():
@ -148,12 +149,13 @@ def raw_info_dictionary():
This function calls all the viable factories one after the other until
there's one that is able to produce the requested information.
"""
# pylint: disable=broad-except
info = {}
for factory in info_factory[platform.system()]:
for factory in INFO_FACTORY[platform.system()]:
try:
info = factory()
except Exception as e:
warnings.warn(str(e))
except Exception as exc:
warnings.warn(str(exc))
if info:
adjust_raw_flags(info)
@ -173,9 +175,10 @@ def compatible_microarchitectures(info):
architecture_family = platform.machine()
# If a tester is not registered, be conservative and assume no known
# target is compatible with the host
tester = compatibility_checks.get(architecture_family, lambda x, y: False)
return [x for x in targets.values() if tester(info, x)] or \
[generic_microarchitecture(architecture_family)]
tester = COMPATIBILITY_CHECKS.get(architecture_family, lambda x, y: False)
return [x for x in TARGETS.values() if tester(info, x)] or [
generic_microarchitecture(architecture_family)
]
def host():
@ -188,7 +191,9 @@ def host():
# Reverse sort of the depth for the inheritance tree among only targets we
# can use. This gets the newest target we satisfy.
return sorted(candidates, key=lambda t: len(t.ancestors), reverse=True)[0]
return sorted(
candidates, key=lambda t: (len(t.ancestors), len(t.features)), reverse=True
)[0]
def compatibility_check(architecture_family):
@ -207,50 +212,59 @@ def compatibility_check(architecture_family):
architecture_family = (architecture_family,)
def decorator(func):
# pylint: disable=fixme
# TODO: on removal of Python 2.6 support this can be re-written as
# TODO: an update + a dict comprehension
for arch_family in architecture_family:
compatibility_checks[arch_family] = func
COMPATIBILITY_CHECKS[arch_family] = func
return func
return decorator
@compatibility_check(architecture_family=('ppc64le', 'ppc64'))
@compatibility_check(architecture_family=("ppc64le", "ppc64"))
def compatibility_check_for_power(info, target):
"""Compatibility check for PPC64 and PPC64LE architectures."""
basename = platform.machine()
generation_match = re.search(r'POWER(\d+)', info.get('cpu', ''))
generation_match = re.search(r"POWER(\d+)", info.get("cpu", ""))
generation = int(generation_match.group(1))
# We can use a target if it descends from our machine type and our
# generation (9 for POWER9, etc) is at least its generation.
arch_root = targets[basename]
return (target == arch_root or arch_root in target.ancestors) \
and target.generation <= generation
arch_root = TARGETS[basename]
return (
target == arch_root or arch_root in target.ancestors
) and target.generation <= generation
@compatibility_check(architecture_family='x86_64')
@compatibility_check(architecture_family="x86_64")
def compatibility_check_for_x86_64(info, target):
basename = 'x86_64'
vendor = info.get('vendor_id', 'generic')
features = set(info.get('flags', '').split())
"""Compatibility check for x86_64 architectures."""
basename = "x86_64"
vendor = info.get("vendor_id", "generic")
features = set(info.get("flags", "").split())
# We can use a target if it descends from our machine type, is from our
# vendor, and we have all of its features
arch_root = targets[basename]
return (target == arch_root or arch_root in target.ancestors) \
and (target.vendor == vendor or target.vendor == 'generic') \
arch_root = TARGETS[basename]
return (
(target == arch_root or arch_root in target.ancestors)
and (target.vendor == vendor or target.vendor == "generic")
and target.features.issubset(features)
)
@compatibility_check(architecture_family='aarch64')
@compatibility_check(architecture_family="aarch64")
def compatibility_check_for_aarch64(info, target):
basename = 'aarch64'
features = set(info.get('Features', '').split())
vendor = info.get('CPU implementer', 'generic')
"""Compatibility check for AARCH64 architectures."""
basename = "aarch64"
features = set(info.get("Features", "").split())
vendor = info.get("CPU implementer", "generic")
arch_root = targets[basename]
return (target == arch_root or arch_root in target.ancestors) \
and (target.vendor == vendor or target.vendor == 'generic') \
arch_root = TARGETS[basename]
return (
(target == arch_root or arch_root in target.ancestors)
and (target.vendor == vendor or target.vendor == "generic")
and target.features.issubset(features)
)

231
lib/spack/llnl/util/cpu/microarchitecture.py → lib/spack/external/archspec/cpu/microarchitecture.py vendored
View File

@ -1,81 +1,81 @@
# Copyright 2013-2020 Lawrence Livermore National Security, LLC and other
# Spack Project Developers. See the top-level COPYRIGHT file for details.
# Copyright 2019-2020 Lawrence Livermore National Security, LLC and other
# Archspec Project Developers. See the top-level COPYRIGHT file for details.
#
# SPDX-License-Identifier: (Apache-2.0 OR MIT)
"""Types and functions to manage information
on CPU microarchitectures.
"""
# pylint: disable=useless-object-inheritance
import functools
import platform
import re
import warnings
try:
from collections.abc import Sequence # novm
except ImportError:
from collections import Sequence
import six
import llnl.util
import llnl.util.cpu.alias
import llnl.util.cpu.schema
import archspec
import archspec.cpu.alias
import archspec.cpu.schema
from .alias import FEATURE_ALIASES
from .schema import LazyDictionary
from .alias import feature_aliases
def coerce_target_names(func):
"""Decorator that automatically converts a known target name to a proper
Microarchitecture object.
"""
@functools.wraps(func)
def _impl(self, other):
if isinstance(other, six.string_types):
if other not in targets:
if other not in TARGETS:
msg = '"{0}" is not a valid target name'
raise ValueError(msg.format(other))
other = targets[other]
other = TARGETS[other]
return func(self, other)
return _impl
class Microarchitecture(object):
"""Represents a specific CPU micro-architecture.
Args:
name (str): name of the micro-architecture (e.g. skylake).
parents (list): list of parents micro-architectures, if any.
Parenthood is considered by cpu features and not
chronologically. As such each micro-architecture is
compatible with its ancestors. For example "skylake",
which has "broadwell" as a parent, supports running binaries
optimized for "broadwell".
vendor (str): vendor of the micro-architecture
features (list of str): supported CPU flags. Note that the semantic
of the flags in this field might vary among architectures, if
at all present. For instance x86_64 processors will list all
the flags supported by a given CPU while Arm processors will
list instead only the flags that have been added on top of the
base model for the current micro-architecture.
compilers (dict): compiler support to generate tuned code for this
micro-architecture. This dictionary has as keys names of
supported compilers, while values are list of dictionaries
with fields:
* name: name of the micro-architecture according to the
compiler. This is the name passed to the ``-march`` option
or similar. Not needed if the name is the same as that
passed in as argument above.
* versions: versions that support this micro-architecture.
generation (int): generation of the micro-architecture, if
relevant.
"""
# pylint: disable=too-many-arguments
#: Aliases for micro-architecture's features
feature_aliases = feature_aliases
feature_aliases = FEATURE_ALIASES
def __init__(
self, name, parents, vendor, features, compilers, generation=0
):
"""Represents a specific CPU micro-architecture.
Args:
name (str): name of the micro-architecture (e.g. skylake).
parents (list): list of parents micro-architectures, if any.
Parenthood is considered by cpu features and not
chronologically. As such each micro-architecture is
compatible with its ancestors. For example "skylake",
which has "broadwell" as a parent, supports running binaries
optimized for "broadwell".
vendor (str): vendor of the micro-architecture
features (list of str): supported CPU flags. Note that the semantic
of the flags in this field might vary among architectures, if
at all present. For instance x86_64 processors will list all
the flags supported by a given CPU while Arm processors will
list instead only the flags that have been added on top of the
base model for the current micro-architecture.
compilers (dict): compiler support to generate tuned code for this
micro-architecture. This dictionary has as keys names of
supported compilers, while values are list of dictionaries
with fields:
* name: name of the micro-architecture according to the
compiler. This is the name passed to the ``-march`` option
or similar. Not needed if the name is the same as that
passed in as argument above.
* versions: versions that support this micro-architecture.
generation (int): generation of the micro-architecture, if
relevant.
"""
def __init__(self, name, parents, vendor, features, compilers, generation=0):
self.name = name
self.parents = parents
self.vendor = vendor
@ -85,6 +85,7 @@ def __init__(
@property
def ancestors(self):
"""All the ancestors of this microarchitecture."""
value = self.parents[:]
for parent in self.parents:
value.extend(a for a in parent.ancestors if a not in value)
@ -101,12 +102,14 @@ def __eq__(self, other):
if not isinstance(other, Microarchitecture):
return NotImplemented
return (self.name == other.name and
self.vendor == other.vendor and
self.features == other.features and
self.ancestors == other.ancestors and
self.compilers == other.compilers and
self.generation == other.generation)
return (
self.name == other.name
and self.vendor == other.vendor
and self.features == other.features
and self.ancestors == other.ancestors
and self.compilers == other.compilers
and self.generation == other.generation
)
@coerce_target_names
def __ne__(self, other):
@ -136,8 +139,10 @@ def __ge__(self, other):
def __repr__(self):
cls_name = self.__class__.__name__
fmt = cls_name + '({0.name!r}, {0.parents!r}, {0.vendor!r}, ' \
'{0.features!r}, {0.compilers!r}, {0.generation!r})'
fmt = (
cls_name + "({0.name!r}, {0.parents!r}, {0.vendor!r}, "
"{0.features!r}, {0.compilers!r}, {0.generation!r})"
)
return fmt.format(self)
def __str__(self):
@ -146,7 +151,7 @@ def __str__(self):
def __contains__(self, feature):
# Feature must be of a string type, so be defensive about that
if not isinstance(feature, six.string_types):
msg = 'only objects of string types are accepted [got {0}]'
msg = "only objects of string types are accepted [got {0}]"
raise TypeError(msg.format(str(type(feature))))
# Here we look first in the raw features, and fall-back to
@ -155,9 +160,7 @@ def __contains__(self, feature):
return True
# Check if the alias is defined, if not it will return False
match_alias = Microarchitecture.feature_aliases.get(
feature, lambda x: False
)
match_alias = Microarchitecture.feature_aliases.get(feature, lambda x: False)
return match_alias(self)
@property
@ -165,7 +168,7 @@ def family(self):
"""Returns the architecture family a given target belongs to"""
roots = [x for x in [self] + self.ancestors if not x.ancestors]
msg = "a target is expected to belong to just one architecture family"
msg += "[found {0}]".format(', '.join(str(x) for x in roots))
msg += "[found {0}]".format(", ".join(str(x) for x in roots))
assert len(roots) == 1, msg
return roots.pop()
@ -178,13 +181,11 @@ def to_dict(self, return_list_of_items=False):
items instead of the dictionary
"""
list_of_items = [
('name', str(self.name)),
('vendor', str(self.vendor)),
('features', sorted(
str(x) for x in self.features
)),
('generation', self.generation),
('parents', [str(x) for x in self.parents])
("name", str(self.name)),
("vendor", str(self.vendor)),
("features", sorted(str(x) for x in self.features)),
("generation", self.generation),
("parents", [str(x) for x in self.parents]),
]
if return_list_of_items:
return list_of_items
@ -204,19 +205,18 @@ def optimization_flags(self, compiler, version):
compiler (str): name of the compiler to be used
version (str): version of the compiler to be used
"""
# If we don't have information on compiler at all
# return an empty string
# If we don't have information on compiler at all return an empty string
if compiler not in self.family.compilers:
return ''
return ""
# If we have information but it stops before this
# microarchitecture, fall back to the best known target
if compiler not in self.compilers:
best_target = [
x for x in self.ancestors if compiler in x.compilers
][0]
msg = ("'{0}' compiler is known to optimize up to the '{1}'"
" microarchitecture in the '{2}' architecture family")
best_target = [x for x in self.ancestors if compiler in x.compilers][0]
msg = (
"'{0}' compiler is known to optimize up to the '{1}'"
" microarchitecture in the '{2}' architecture family"
)
msg = msg.format(compiler, best_target, best_target.family)
raise UnsupportedMicroarchitecture(msg)
@ -224,20 +224,17 @@ def optimization_flags(self, compiler, version):
# version being used
compiler_info = self.compilers[compiler]
# Normalize the entries to have a uniform treatment in the code below
if not isinstance(compiler_info, Sequence):
compiler_info = [compiler_info]
def satisfies_constraint(entry, version):
min_version, max_version = entry['versions'].split(':')
min_version, max_version = entry["versions"].split(":")
# Extract numeric part of the version
# Check version suffixes
min_version, _ = version_components(min_version)
max_version, _ = version_components(max_version)
version, _ = version_components(version)
# Assume compiler versions fit into semver
tuplify = lambda x: tuple(int(y) for y in x.split('.'))
def tuplify(ver):
return tuple(int(y) for y in ver.split("."))
version = tuplify(version)
if min_version:
@ -254,23 +251,29 @@ def satisfies_constraint(entry, version):
for compiler_entry in compiler_info:
if satisfies_constraint(compiler_entry, version):
flags_fmt = compiler_entry['flags']
flags_fmt = compiler_entry["flags"]
# If there's no field name, use the name of the
# micro-architecture
compiler_entry.setdefault('name', self.name)
compiler_entry.setdefault("name", self.name)
# Check if we need to emit a warning
warning_message = compiler_entry.get('warnings', None)
warning_message = compiler_entry.get("warnings", None)
if warning_message:
warnings.warn(warning_message)
flags = flags_fmt.format(**compiler_entry)
return flags
msg = ("cannot produce optimized binary for micro-architecture '{0}'"
" with {1}@{2} [supported compiler versions are {3}]")
msg = msg.format(self.name, compiler, version,
', '.join([x['versions'] for x in compiler_info]))
msg = (
"cannot produce optimized binary for micro-architecture '{0}'"
" with {1}@{2} [supported compiler versions are {3}]"
)
msg = msg.format(
self.name,
compiler,
version,
", ".join([x["versions"] for x in compiler_info]),
)
raise UnsupportedMicroarchitecture(msg)
@ -281,7 +284,7 @@ def generic_microarchitecture(name):
name (str): name of the micro-architecture
"""
return Microarchitecture(
name, parents=[], vendor='generic', features=[], compilers={}
name, parents=[], vendor="generic", features=[], compilers={}
)
@ -289,15 +292,15 @@ def version_components(version):
"""Decomposes the version passed as input in version number and
suffix and returns them.
If the version number of the suffix are not present, an empty
If the version number or the suffix are not present, an empty
string is returned.
Args:
version (str): version to be decomposed into its components
"""
match = re.match(r'([\d.]*)(-?)(.*)', str(version))
match = re.match(r"([\d.]*)(-?)(.*)", str(version))
if not match:
return '', ''
return "", ""
version_number = match.group(1)
suffix = match.group(3)
@ -309,7 +312,7 @@ def _known_microarchitectures():
"""Returns a dictionary of the known micro-architectures. If the
current host platform is unknown adds it too as a generic target.
"""
# pylint: disable=fixme
# TODO: Simplify this logic using object_pairs_hook to OrderedDict
# TODO: when we stop supporting python2.6
@ -326,44 +329,40 @@ def fill_target_from_dict(name, data, targets):
values = data[name]
# Get direct parents of target
parent_names = values['from']
if isinstance(parent_names, six.string_types):
parent_names = [parent_names]
if parent_names is None:
parent_names = []
for p in parent_names:
parent_names = values["from"]
for parent in parent_names:
# Recursively fill parents so they exist before we add them
if p in targets:
if parent in targets:
continue
fill_target_from_dict(p, data, targets)
parents = [targets.get(p) for p in parent_names]
fill_target_from_dict(parent, data, targets)
parents = [targets.get(parent) for parent in parent_names]
vendor = values['vendor']
features = set(values['features'])
compilers = values.get('compilers', {})
generation = values.get('generation', 0)
vendor = values["vendor"]
features = set(values["features"])
compilers = values.get("compilers", {})
generation = values.get("generation", 0)
targets[name] = Microarchitecture(
name, parents, vendor, features, compilers, generation
)
targets = {}
data = llnl.util.cpu.schema.targets_json['microarchitectures']
known_targets = {}
data = archspec.cpu.schema.TARGETS_JSON["microarchitectures"]
for name in data:
if name in targets:
if name in known_targets:
# name was already brought in as ancestor to a target
continue
fill_target_from_dict(name, data, targets)
fill_target_from_dict(name, data, known_targets)
# Add the host platform if not present
host_platform = platform.machine()
targets.setdefault(host_platform, generic_microarchitecture(host_platform))
known_targets.setdefault(host_platform, generic_microarchitecture(host_platform))
return targets
return known_targets
#: Dictionary of known micro-architectures
targets = LazyDictionary(_known_microarchitectures)
TARGETS = LazyDictionary(_known_microarchitectures)
class UnsupportedMicroarchitecture(ValueError):

70
lib/spack/external/archspec/cpu/schema.py vendored Normal file
View File

@ -0,0 +1,70 @@
# Copyright 2019-2020 Lawrence Livermore National Security, LLC and other
# Archspec Project Developers. See the top-level COPYRIGHT file for details.
#
# SPDX-License-Identifier: (Apache-2.0 OR MIT)
"""Global objects with the content of the microarchitecture
JSON file and its schema
"""
import json
import os.path
try:
from collections.abc import MutableMapping # novm
except ImportError:
from collections import MutableMapping
class LazyDictionary(MutableMapping):
"""Lazy dictionary that gets constructed on first access to any object key
Args:
factory (callable): factory function to construct the dictionary
"""
def __init__(self, factory, *args, **kwargs):
self.factory = factory
self.args = args
self.kwargs = kwargs
self._data = None
@property
def data(self):
"""Returns the lazily constructed dictionary"""
if self._data is None:
self._data = self.factory(*self.args, **self.kwargs)
return self._data
def __getitem__(self, key):
return self.data[key]
def __setitem__(self, key, value):
self.data[key] = value
def __delitem__(self, key):
del self.data[key]
def __iter__(self):
return iter(self.data)
def __len__(self):
return len(self.data)
def _load_json_file(json_file):
json_dir = os.path.join(os.path.dirname(__file__), "..", "json", "cpu")
json_dir = os.path.abspath(json_dir)
def _factory():
filename = os.path.join(json_dir, json_file)
with open(filename, "r") as file:
return json.load(file)
return _factory
#: In memory representation of the data in microarchitectures.json,
#: loaded on first access
TARGETS_JSON = LazyDictionary(_load_json_file("microarchitectures.json"))
#: JSON schema for microarchitectures.json, loaded on first access
SCHEMA = LazyDictionary(_load_json_file("microarchitectures_schema.json"))

22
lib/spack/external/archspec/json/COPYRIGHT vendored Normal file
View File

@ -0,0 +1,22 @@
Intellectual Property Notice
------------------------------
Archspec is licensed under the Apache License, Version 2.0 (LICENSE-APACHE
or http://www.apache.org/licenses/LICENSE-2.0) or the MIT license,
(LICENSE-MIT or http://opensource.org/licenses/MIT), at your option.
Copyrights and patents in the Archspec project are retained by contributors.
No copyright assignment is required to contribute to Archspec.
SPDX usage
------------
Individual files contain SPDX tags instead of the full license text.
This enables machine processing of license information based on the SPDX
License Identifiers that are available here: https://spdx.org/licenses/
Files that are dual-licensed as Apache-2.0 OR MIT contain the following
text in the license header:
SPDX-License-Identifier: (Apache-2.0 OR MIT)

202
lib/spack/external/archspec/json/LICENSE-APACHE vendored Normal file
View File

@ -0,0 +1,202 @@
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To apply the Apache License to your work, attach the following
boilerplate notice, with the fields enclosed by brackets "[]"
replaced with your own identifying information. (Don't include
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Copyright [yyyy] [name of copyright owner]
Licensed under the Apache License, Version 2.0 (the "License");
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
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20
lib/spack/external/archspec/json/LICENSE-MIT vendored Normal file
View File

@ -0,0 +1,20 @@
Copyright 2019-2020 Lawrence Livermore National Security, LLC and other
Archspec Project Developers. See the top-level COPYRIGHT file for details.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.

21
lib/spack/external/archspec/json/NOTICE vendored Normal file
View File

@ -0,0 +1,21 @@
This work was produced under the auspices of the U.S. Department of
Energy by Lawrence Livermore National Laboratory under Contract
DE-AC52-07NA27344.
This work was prepared as an account of work sponsored by an agency of
the United States Government. Neither the United States Government nor
Lawrence Livermore National Security, LLC, nor any of their employees
makes any warranty, expressed or implied, or assumes any legal liability
or responsibility for the accuracy, completeness, or usefulness of any
information, apparatus, product, or process disclosed, or represents that
its use would not infringe privately owned rights.
Reference herein to any specific commercial product, process, or service
by trade name, trademark, manufacturer, or otherwise does not necessarily
constitute or imply its endorsement, recommendation, or favoring by the
United States Government or Lawrence Livermore National Security, LLC.
The views and opinions of authors expressed herein do not necessarily
state or reflect those of the United States Government or Lawrence
Livermore National Security, LLC, and shall not be used for advertising
or product endorsement purposes.

36
lib/spack/external/archspec/json/README.md vendored Normal file
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@ -0,0 +1,36 @@
[![](https://github.com/archspec/archspec-json/workflows/JSON%20Validation/badge.svg)](https://github.com/archspec/archspec-json/actions)
# Archspec-json
The [archspec-json](https://github.com/archspec/archspec-json) repository is part of the
[Archspec](https://github.com/archspec) project. It contains data on various architectural
aspects of a platform stored in JSON format and is meant to be used as a base to develop
language specific APIs.
Currently the repository contains the following JSON files:
```console
.
├── COPYRIGHT
└── cpu
   ├── microarchitectures.json # Contains information on CPU microarchitectures
   └── microarchitectures_schema.json # Schema for the file above
```
## License
Archspec is distributed under the terms of both the MIT license and the
Apache License (Version 2.0). Users may choose either license, at their
option.
All new contributions must be made under both the MIT and Apache-2.0
licenses.
See [LICENSE-MIT](https://github.com/archspec/archspec-json/blob/master/LICENSE-MIT),
[LICENSE-APACHE](https://github.com/archspec/archspec-json/blob/master/LICENSE-APACHE),
[COPYRIGHT](https://github.com/archspec/archspec-json/blob/master/COPYRIGHT), and
[NOTICE](https://github.com/archspec/archspec-json/blob/master/NOTICE) for details.
SPDX-License-Identifier: (Apache-2.0 OR MIT)
LLNL-CODE-811653

1074
lib/spack/llnl/util/cpu/microarchitectures.json → lib/spack/external/archspec/json/cpu/microarchitectures.json vendored
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110
lib/spack/external/archspec/json/cpu/microarchitectures_schema.json vendored Normal file
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@ -0,0 +1,110 @@
{
"$schema": "http://json-schema.org/draft-07/schema#",
"title": "Schema for microarchitecture definitions and feature aliases",
"type": "object",
"additionalProperties": false,
"properties": {
"microarchitectures": {
"type": "object",
"patternProperties": {
"([\\w]*)": {
"type": "object",
"properties": {
"from": {
"$comment": "More than one parent",
"type": "array",
"items": {
"type": "string"
}
},
"vendor": {
"type": "string"
},
"features": {
"type": "array",
"items": {
"type": "string"
}
},
"compilers": {
"type": "object",
"patternProperties": {
"([\\w]*)": {
"$comment": "Permit multiple entries since compilers change options across versions",
"type": "array",
"items": {
"type": "object",
"properties": {
"versions": {
"type": "string"
},
"name": {
"type": "string"
},
"flags": {
"type": "string"
}
},
"required": [
"versions",
"flags"
]
}
}
}
}
},
"required": [
"from",
"vendor",
"features"
]
}
}
},
"feature_aliases": {
"type": "object",
"patternProperties": {
"([\\w]*)": {
"type": "object",
"properties": {
"reason": {
"$comment": "Comment containing the reason why an alias is there",
"type": "string"
},
"any_of": {
"$comment": "The alias is true if any of the items is a feature of the target",
"type": "array",
"items": {
"type": "string"
}
},
"families": {
"$comment": "The alias is true if the family of the target is in this list",
"type": "array",
"items": {
"type": "string"
}
}
},
"additionalProperties": false
}
}
},
"conversions": {
"type": "object",
"properties": {
"description": {
"type": "string"
},
"arm_vendors": {
"type": "object"
},
"darwin_flags": {
"type": "object"
}
},
"additionalProperties": false
}
}
}

18
lib/spack/llnl/util/cpu/__init__.py
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@ -1,18 +0,0 @@
# Copyright 2013-2020 Lawrence Livermore National Security, LLC and other
# Spack Project Developers. See the top-level COPYRIGHT file for details.
#
# SPDX-License-Identifier: (Apache-2.0 OR MIT)
from .microarchitecture import Microarchitecture, UnsupportedMicroarchitecture
from .microarchitecture import targets, generic_microarchitecture
from .microarchitecture import version_components
from .detect import host
__all__ = [
'Microarchitecture',
'UnsupportedMicroarchitecture',
'targets',
'generic_microarchitecture',
'host',
'version_components'
]

102
lib/spack/llnl/util/cpu/alias.py
View File

@ -1,102 +0,0 @@
# Copyright 2013-2020 Lawrence Livermore National Security, LLC and other
# Spack Project Developers. See the top-level COPYRIGHT file for details.
#
# SPDX-License-Identifier: (Apache-2.0 OR MIT)
#: Known predicates that can be used to construct feature aliases
from .schema import targets_json, LazyDictionary, properties
_feature_alias_predicate = {}
class FeatureAliasTest(object):
"""A test that must be passed for a feature alias to succeed.
Args:
rules (dict): dictionary of rules to be met. Each key must be a
valid alias predicate
"""
def __init__(self, rules):
self.rules = rules
self.predicates = []
for name, args in rules.items():
self.predicates.append(_feature_alias_predicate[name](args))
def __call__(self, microarchitecture):
return all(
feature_test(microarchitecture) for feature_test in self.predicates
)
def _feature_aliases():
"""Returns the dictionary of all defined feature aliases."""
json_data = targets_json['feature_aliases']
aliases = {}
for alias, rules in json_data.items():
aliases[alias] = FeatureAliasTest(rules)
return aliases
feature_aliases = LazyDictionary(_feature_aliases)
def alias_predicate(predicate_schema):
"""Decorator to register a predicate that can be used to define
feature aliases.
Args:
predicate_schema (dict): schema to be enforced in
microarchitectures.json for the predicate
"""
def decorator(func):
name = func.__name__
# Check we didn't register anything else with the same name
if name in _feature_alias_predicate:
msg = 'the alias predicate "{0}" already exists'.format(name)
raise KeyError(msg)
# Update the overall schema
alias_schema = properties['feature_aliases']['patternProperties']
alias_schema[r'([\w]*)']['properties'].update(
{name: predicate_schema}
)
# Register the predicate
_feature_alias_predicate[name] = func
return func
return decorator
@alias_predicate(predicate_schema={'type': 'string'})
def reason(motivation_for_the_alias):
"""This predicate returns always True and it's there to allow writing
a documentation string in the JSON file to explain why an alias is needed.
"""
return lambda x: True
@alias_predicate(predicate_schema={
'type': 'array',
'items': {'type': 'string'}
})
def any_of(list_of_features):
"""Returns a predicate that is True if any of the feature in the
list is in the microarchitecture being tested, False otherwise.
"""
def _impl(microarchitecture):
return any(x in microarchitecture for x in list_of_features)
return _impl
@alias_predicate(predicate_schema={
'type': 'array',
'items': {'type': 'string'}
})
def families(list_of_families):
"""Returns a predicate that is True if the architecture family of
the microarchitecture being tested is in the list, False otherwise.
"""
def _impl(microarchitecture):
return str(microarchitecture.family) in list_of_families
return _impl

147
lib/spack/llnl/util/cpu/schema.py
View File

@ -1,147 +0,0 @@
# Copyright 2013-2020 Lawrence Livermore National Security, LLC and other
# Spack Project Developers. See the top-level COPYRIGHT file for details.
#
# SPDX-License-Identifier: (Apache-2.0 OR MIT)
import json
import os.path
try:
from collections.abc import MutableMapping # novm
except ImportError:
from collections import MutableMapping
compilers_schema = {
'type': 'object',
'properties': {
'versions': {'type': 'string'},
'name': {'type': 'string'},
'flags': {'type': 'string'}
},
'required': ['versions', 'flags']
}
properties = {
'microarchitectures': {
'type': 'object',
'patternProperties': {
r'([\w]*)': {
'type': 'object',
'properties': {
'from': {
'anyOf': [
# More than one parent
{'type': 'array', 'items': {'type': 'string'}},
# Exactly one parent
{'type': 'string'},
# No parent
{'type': 'null'}
]
},
'vendor': {
'type': 'string'
},
'features': {
'type': 'array',
'items': {'type': 'string'}
},
'compilers': {
'type': 'object',
'patternProperties': {
r'([\w]*)': {
'anyOf': [
compilers_schema,
{
'type': 'array',
'items': compilers_schema
}
]
}
}
}
},
'required': ['from', 'vendor', 'features']
}
}
},
'feature_aliases': {
'type': 'object',
'patternProperties': {
r'([\w]*)': {
'type': 'object',
'properties': {},
'additionalProperties': False
}
},
},
'conversions': {
'type': 'object',
'properties': {
'description': {
'type': 'string'
},
'arm_vendors': {
'type': 'object',
},
'darwin_flags': {
'type': 'object'
}
},
'additionalProperties': False
}
}
schema = {
'$schema': 'http://json-schema.org/schema#',
'title': 'Schema for microarchitecture definitions and feature aliases',
'type': 'object',
'additionalProperties': False,
'properties': properties,
}
class LazyDictionary(MutableMapping):
"""Lazy dictionary that gets constructed on first access to any object key
Args:
factory (callable): factory function to construct the dictionary
"""
def __init__(self, factory, *args, **kwargs):
self.factory = factory
self.args = args
self.kwargs = kwargs
self._data = None
@property
def data(self):
if self._data is None:
self._data = self.factory(*self.args, **self.kwargs)
return self._data
def __getitem__(self, key):
return self.data[key]
def __setitem__(self, key, value):
self.data[key] = value
def __delitem__(self, key):
del self.data[key]
def __iter__(self):
return iter(self.data)
def __len__(self):
return len(self.data)
def _load_targets_json():
"""Loads ``microarchitectures.json`` in memory."""
directory_name = os.path.dirname(os.path.abspath(__file__))
filename = os.path.join(directory_name, 'microarchitectures.json')
with open(filename, 'r') as f:
return json.load(f)
#: In memory representation of the data in microarchitectures.json,
#: loaded on first access
targets_json = LazyDictionary(_load_targets_json)

14
lib/spack/spack/architecture.py
View File

@ -60,9 +60,9 @@
import inspect
import warnings
import archspec.cpu
import six
import llnl.util.cpu as cpu
import llnl.util.tty as tty
from llnl.util.lang import memoized, list_modules, key_ordering
@ -109,9 +109,9 @@ def __init__(self, name, module_name=None):
current target. This is typically used on machines
like Cray (e.g. craype-compiler)
"""
if not isinstance(name, cpu.Microarchitecture):
name = cpu.targets.get(
name, cpu.generic_microarchitecture(name)
if not isinstance(name, archspec.cpu.Microarchitecture):
name = archspec.cpu.TARGETS.get(
name, archspec.cpu.generic_microarchitecture(name)
)
self.microarchitecture = name
self.module_name = module_name
@ -207,7 +207,9 @@ def optimization_flags(self, compiler):
# has an unexpected suffix. If so, treat it as a compiler with a
# custom spec.
compiler_version = compiler.version
version_number, suffix = cpu.version_components(compiler.version)
version_number, suffix = archspec.cpu.version_components(
compiler.version
)
if not version_number or suffix not in ('', 'apple'):
# Try to deduce the underlying version of the compiler, regardless
# of its name in compilers.yaml. Depending on where this function
@ -555,7 +557,7 @@ def sys_type():
def compatible_sys_types():
"""Returns a list of all the systypes compatible with the current host."""
compatible_archs = []
current_host = cpu.host()
current_host = archspec.cpu.host()
compatible_targets = [current_host] + current_host.ancestors
for target in compatible_targets:
arch = Arch(platform(), 'default_os', target)

4
lib/spack/spack/cmd/arch.py
View File

@ -7,7 +7,7 @@
import collections
import llnl.util.cpu
import archspec.cpu
import llnl.util.tty.colify as colify
import llnl.util.tty.color as color
import spack.architecture as architecture
@ -73,7 +73,7 @@ def display_target_group(header, target_group):
def arch(parser, args):
if args.known_targets:
display_targets(llnl.util.cpu.targets)
display_targets(archspec.cpu.TARGETS)
return
if args.frontend:

8
lib/spack/spack/compilers/__init__.py
View File

@ -15,7 +15,7 @@
import llnl.util.lang
import llnl.util.filesystem as fs
import llnl.util.tty as tty
import llnl.util.cpu as cpu
import archspec.cpu
import spack.paths
import spack.error
@ -405,7 +405,7 @@ def get_compilers(config, cspec=None, arch_spec=None):
target = items.get('target', None)
try:
current_target = llnl.util.cpu.targets[str(arch_spec.target)]
current_target = archspec.cpu.TARGETS[str(arch_spec.target)]
family = str(current_target.family)
except KeyError:
# TODO: Check if this exception handling makes sense, or if we
@ -417,7 +417,7 @@ def get_compilers(config, cspec=None, arch_spec=None):
if arch_spec and target and (target != family and target != 'any'):
# If the family of the target is the family we are seeking,
# there's an error in the underlying configuration
if llnl.util.cpu.targets[target].family == family:
if archspec.cpu.TARGETS[target].family == family:
msg = ('the "target" field in compilers.yaml accepts only '
'target families [replace "{0}" with "{1}"'
' in "{2}" specification]')
@ -664,7 +664,7 @@ def _default_make_compilers(cmp_id, paths):
compiler_cls = spack.compilers.class_for_compiler_name(compiler_name)
spec = spack.spec.CompilerSpec(compiler_cls.name, version)
paths = [paths.get(x, None) for x in ('cc', 'cxx', 'f77', 'fc')]
target = cpu.host()
target = archspec.cpu.host()
compiler = compiler_cls(
spec, operating_system, str(target.family), paths
)

14
lib/spack/spack/concretize.py
View File

@ -19,6 +19,9 @@
import platform
import os.path
import tempfile
import archspec.cpu
import llnl.util.filesystem as fs
import llnl.util.tty as tty
@ -27,7 +30,6 @@
from contextlib import contextmanager
import llnl.util.lang
import llnl.util.cpu as cpu
import spack.repo
import spack.abi
@ -325,7 +327,7 @@ def target_from_package_preferences(self, spec):
"""
target_prefs = PackagePrefs(spec.name, 'target')
target_specs = [spack.spec.Spec('target=%s' % tname)
for tname in cpu.targets]
for tname in archspec.cpu.TARGETS]
def tspec_filter(s):
# Filter target specs by whether the architecture
@ -333,7 +335,7 @@ def tspec_filter(s):
# we only consider x86_64 targets when on an
# x86_64 machine, etc. This may need to change to
# enable setting cross compiling as a default
target = cpu.targets[str(s.architecture.target)]
target = archspec.cpu.TARGETS[str(s.architecture.target)]
arch_family_name = target.family.name
return arch_family_name == platform.machine()
@ -569,7 +571,7 @@ def _adjust_target(self, spec):
Returns:
True if any modification happened, False otherwise
"""
import llnl.util.cpu
import archspec.cpu
# Try to adjust the target only if it is the default
# target for this platform
@ -589,14 +591,14 @@ def _adjust_target(self, spec):
try:
current_target.optimization_flags(spec.compiler)
except llnl.util.cpu.UnsupportedMicroarchitecture:
except archspec.cpu.UnsupportedMicroarchitecture:
microarchitecture = current_target.microarchitecture
for ancestor in microarchitecture.ancestors:
candidate = None
try:
candidate = spack.architecture.Target(ancestor)
candidate.optimization_flags(spec.compiler)
except llnl.util.cpu.UnsupportedMicroarchitecture:
except archspec.cpu.UnsupportedMicroarchitecture:
continue
if candidate is not None:

4
lib/spack/spack/main.py
View File

@ -21,7 +21,7 @@
import warnings
from six import StringIO
import llnl.util.cpu
import archspec.cpu
import llnl.util.filesystem as fs
import llnl.util.tty as tty
import llnl.util.tty.color as color
@ -664,7 +664,7 @@ def shell_set(var, value):
# print environment module system if available. This can be expensive
# on clusters, so skip it if not needed.
if 'modules' in info:
generic_arch = llnl.util.cpu.host().family
generic_arch = archspec.cpu.host().family
module_spec = 'environment-modules target={0}'.format(generic_arch)
specs = spack.store.db.query(module_spec)
if specs:

18
lib/spack/spack/platforms/cray.py
View File

@ -2,12 +2,13 @@
# Spack Project Developers. See the top-level COPYRIGHT file for details.
#
# SPDX-License-Identifier: (Apache-2.0 OR MIT)
import os
import os.path
import re
import platform
import llnl.util.cpu as cpu
import archspec.cpu
import llnl.util.tty as tty
from spack.paths import build_env_path
from spack.util.executable import Executable
@ -60,10 +61,12 @@ def __init__(self):
raise NoPlatformError()
# Setup frontend targets
for name in cpu.targets:
for name in archspec.cpu.TARGETS:
if name not in self.targets:
self.add_target(name, Target(name))
self.front_end = os.environ.get('SPACK_FRONT_END', cpu.host().name)
self.front_end = os.environ.get(
'SPACK_FRONT_END', archspec.cpu.host().name
)
if self.front_end not in self.targets:
self.add_target(self.front_end, Target(self.front_end))
@ -143,13 +146,13 @@ def _default_target_from_env(self):
tty.debug("Found default module:%s" % default_from_module)
return default_from_module
else:
front_end = cpu.host().name
front_end = archspec.cpu.host().name
if front_end in list(
map(lambda x: _target_name_from_craype_target_name(x),
self._avail_targets())
):
tty.debug("default to front-end architecture")
return cpu.host().name
return archspec.cpu.host().name
else:
return platform.machine()
@ -167,7 +170,8 @@ def target_names_from_modules(modules):
if 'craype-' in mod:
name = mod[7:]
_n = name.replace('-', '_') # test for mic-knl/mic_knl
is_target_name = name in cpu.targets or _n in cpu.targets
is_target_name = (name in archspec.cpu.TARGETS or
_n in archspec.cpu.TARGETS)
is_cray_target_name = name in _craype_name_to_target_name
if is_target_name or is_cray_target_name:
targets.append(name)

8
lib/spack/spack/platforms/darwin.py
View File

@ -4,7 +4,9 @@
# SPDX-License-Identifier: (Apache-2.0 OR MIT)
import platform
import llnl.util.cpu as cpu
import archspec.cpu
from spack.architecture import Platform, Target
from spack.operating_systems.mac_os import MacOs
@ -17,10 +19,10 @@ class Darwin(Platform):
def __init__(self):
super(Darwin, self).__init__('darwin')
for name in cpu.targets:
for name in archspec.cpu.TARGETS:
self.add_target(name, Target(name))
self.default = cpu.host().name
self.default = archspec.cpu.host().name
self.front_end = self.default
self.back_end = self.default

9
lib/spack/spack/platforms/linux.py
View File

@ -2,11 +2,12 @@
# Spack Project Developers. See the top-level COPYRIGHT file for details.
#
# SPDX-License-Identifier: (Apache-2.0 OR MIT)
import platform
import archspec.cpu
from spack.architecture import Platform, Target
from spack.operating_systems.linux_distro import LinuxDistro
import llnl.util.cpu as cpu
class Linux(Platform):
@ -15,11 +16,11 @@ class Linux(Platform):
def __init__(self):
super(Linux, self).__init__('linux')
for name in cpu.targets:
for name in archspec.cpu.TARGETS:
self.add_target(name, Target(name))
# Get specific default
self.default = cpu.host().name
self.default = archspec.cpu.host().name
self.front_end = self.default
self.back_end = self.default

13
lib/spack/spack/test/concretize.py
View File

@ -2,8 +2,10 @@
# Spack Project Developers. See the top-level COPYRIGHT file for details.
#
# SPDX-License-Identifier: (Apache-2.0 OR MIT)
import pytest
import archspec.cpu
import llnl.util.lang
import spack.architecture
@ -92,13 +94,13 @@ def current_host(request, monkeypatch):
# is_preference is not empty if we want to supply the
# preferred target via packages.yaml
cpu, _, is_preference = request.param.partition('-')
target = llnl.util.cpu.targets[cpu]
target = archspec.cpu.TARGETS[cpu]
# this function is memoized, so clear its state for testing
spack.architecture.get_platform.cache.clear()
if not is_preference:
monkeypatch.setattr(llnl.util.cpu, 'host', lambda: target)
monkeypatch.setattr(archspec.cpu, 'host', lambda: target)
monkeypatch.setattr(spack.platforms.test.Test, 'default', cpu)
yield target
else:
@ -613,14 +615,13 @@ def test_noversion_pkg(self, spec):
('mpileaks%gcc@4.4.7', 'core2'),
('mpileaks%gcc@4.8', 'haswell'),
('mpileaks%gcc@5.3.0', 'broadwell'),
# Apple's clang always falls back to x86-64 for now
('mpileaks%apple-clang@9.1.0', 'x86_64')
('mpileaks%apple-clang@5.1.0', 'x86_64')
])
@pytest.mark.regression('13361')
def test_adjusting_default_target_based_on_compiler(
self, spec, best_achievable, current_host
):
best_achievable = llnl.util.cpu.targets[best_achievable]
best_achievable = archspec.cpu.TARGETS[best_achievable]
expected = best_achievable if best_achievable < current_host \
else current_host
with spack.concretize.disable_compiler_existence_check():

5
lib/spack/spack/test/data/targets/darwin-mojave-haswell
View File

@ -1,5 +0,0 @@
machdep.cpu.vendor: GenuineIntel
machdep.cpu.model: 70
machdep.cpu.brand_string: Intel(R) Core(TM) i7-4980HQ CPU @ 2.80GHz
machdep.cpu.features: FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT PSE36 CLFSH DS ACPI MMX FXSR SSE SSE2 SS HTT TM PBE SSE3 PCLMULQDQ DTES64 MON DSCPL VMX SMX EST TM2 SSSE3 FMA CX16 TPR PDCM SSE4.1 SSE4.2 x2APIC MOVBE POPCNT AES PCID XSAVE OSXSAVE SEGLIM64 TSCTMR AVX1.0 RDRAND F16C
machdep.cpu.leaf7_features: RDWRFSGS TSC_THREAD_OFFSET BMI1 AVX2 SMEP BMI2 ERMS INVPCID FPU_CSDS MDCLEAR IBRS STIBP L1DF SSBD

59
lib/spack/spack/test/data/targets/darwin-mojave-ivybridge
View File

@ -1,59 +0,0 @@
machdep.cpu.max_basic: 13
machdep.cpu.max_ext: 2147483656
machdep.cpu.vendor: GenuineIntel
machdep.cpu.brand_string: Intel(R) Core(TM) i5-3230M CPU @ 2.60GHz
machdep.cpu.family: 6
machdep.cpu.model: 58
machdep.cpu.extmodel: 3
machdep.cpu.extfamily: 0
machdep.cpu.stepping: 9
machdep.cpu.feature_bits: 9203919201183202303
machdep.cpu.leaf7_feature_bits: 641 0
machdep.cpu.leaf7_feature_bits_edx: 2617246720
machdep.cpu.extfeature_bits: 4967106816
machdep.cpu.signature: 198313
machdep.cpu.brand: 0
machdep.cpu.features: FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT PSE36 CLFSH DS ACPI MMX FXSR SSE SSE2 SS HTT TM PBE SSE3 PCLMULQDQ DTES64 MON DSCPL VMX EST TM2 SSSE3 CX16 TPR PDCM SSE4.1 SSE4.2 x2APIC POPCNT AES PCID XSAVE OSXSAVE TSCTMR AVX1.0 RDRAND F16C
machdep.cpu.leaf7_features: RDWRFSGS SMEP ERMS MDCLEAR IBRS STIBP L1DF SSBD
machdep.cpu.extfeatures: SYSCALL XD EM64T LAHF RDTSCP TSCI
machdep.cpu.logical_per_package: 16
machdep.cpu.cores_per_package: 8
machdep.cpu.microcode_version: 33
machdep.cpu.processor_flag: 4
machdep.cpu.mwait.linesize_min: 64
machdep.cpu.mwait.linesize_max: 64
machdep.cpu.mwait.extensions: 3
machdep.cpu.mwait.sub_Cstates: 135456
machdep.cpu.thermal.sensor: 1
machdep.cpu.thermal.dynamic_acceleration: 1
machdep.cpu.thermal.invariant_APIC_timer: 1
machdep.cpu.thermal.thresholds: 2
machdep.cpu.thermal.ACNT_MCNT: 1
machdep.cpu.thermal.core_power_limits: 1
machdep.cpu.thermal.fine_grain_clock_mod: 1
machdep.cpu.thermal.package_thermal_intr: 1
machdep.cpu.thermal.hardware_feedback: 0
machdep.cpu.thermal.energy_policy: 0
machdep.cpu.xsave.extended_state: 7 832 832 0
machdep.cpu.xsave.extended_state1: 1 0 0 0
machdep.cpu.arch_perf.version: 3
machdep.cpu.arch_perf.number: 4
machdep.cpu.arch_perf.width: 48
machdep.cpu.arch_perf.events_number: 7
machdep.cpu.arch_perf.events: 0
machdep.cpu.arch_perf.fixed_number: 3
machdep.cpu.arch_perf.fixed_width: 48
machdep.cpu.cache.linesize: 64
machdep.cpu.cache.L2_associativity: 8
machdep.cpu.cache.size: 256
machdep.cpu.tlb.inst.small: 64
machdep.cpu.tlb.inst.large: 8
machdep.cpu.tlb.data.small: 64
machdep.cpu.tlb.data.large: 32
machdep.cpu.tlb.shared: 512
machdep.cpu.address_bits.physical: 36
machdep.cpu.address_bits.virtual: 48
machdep.cpu.core_count: 2
machdep.cpu.thread_count: 4
machdep.cpu.tsc_ccc.numerator: 0
machdep.cpu.tsc_ccc.denominator: 0

5
lib/spack/spack/test/data/targets/darwin-mojave-skylake
View File

@ -1,5 +0,0 @@
machdep.cpu.vendor: GenuineIntel
machdep.cpu.features: FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT PSE36 CLFSH DS ACPI MMX FXSR SSE SSE2 SS HTT TM PBE SSE3 PCLMULQDQ DTES64 MON DSCPL VMX EST TM2 SSSE3 FMA CX16 TPR PDCM SSE4.1 SSE4.2 x2APIC MOVBE POPCNT AES PCID XSAVE OSXSAVE SEGLIM64 TSCTMR AVX1.0 RDRAND F16C
machdep.cpu.leaf7_features: RDWRFSGS TSC_THREAD_OFFSET SGX BMI1 HLE AVX2 SMEP BMI2 ERMS INVPCID RTM FPU_CSDS MPX RDSEED ADX SMAP CLFSOPT IPT MDCLEAR TSXFA IBRS STIBP L1DF SSBD
machdep.cpu.model: 94
machdep.cpu.brand_string: Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz

20
lib/spack/spack/test/data/targets/linux-centos7-cascadelake
View File

@ -1,20 +0,0 @@
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 85
model name : Intel(R) Xeon(R) Platinum 8260M CPU @ 2.40GHz
stepping : 7
microcode : 0x5000024
cpu MHz : 2400.000
cache size : 36608 KB
physical id : 0
siblings : 48
core id : 0
cpu cores : 24
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 22
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch epb cat_l3 cdp_l3 intel_ppin intel_pt ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req pku ospke avx512_vnni md_clear spec_ctrl intel_stibp flush_l1d arch_capabilities

4
lib/spack/spack/test/data/targets/linux-centos7-power8le
View File

@ -1,4 +0,0 @@
processor : 0
cpu : POWER8NVL (raw), altivec supported
clock : 2061.000000MHz
revision : 1.0 (pvr 004c 0100)

8
lib/spack/spack/test/data/targets/linux-centos7-thunderx2
View File

@ -1,8 +0,0 @@
processor : 0
BogoMIPS : 400.00
Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics cpuid asimdrdm
CPU implementer : 0x43
CPU architecture: 8
CPU variant : 0x1
CPU part : 0x0af
CPU revision : 1

27
lib/spack/spack/test/data/targets/linux-fedora32-icelake
View File

@ -1,27 +0,0 @@
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 126
model name : Intel(R) Core(TM) i7-1065G7 CPU @ 1.30GHz
stepping : 5
microcode : 0x78
cpu MHz : 1091.701
cache size : 8192 KB
physical id : 0
siblings : 8
core id : 0
cpu cores : 4
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 27
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb invpcid_single ssbd ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid avx512f avx512dq rdseed adx smap avx512ifma clflushopt intel_pt avx512cd sha_ni avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves split_lock_detect dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req avx512vbmi umip pku ospke avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni avx512_bitalg avx512_vpopcntdq rdpid fsrm md_clear flush_l1d arch_capabilities
vmx flags : vnmi preemption_timer posted_intr invvpid ept_x_only ept_ad ept_1gb flexpriority apicv tsc_offset vtpr mtf vapic ept vpid unrestricted_guest vapic_reg vid ple pml ept_mode_based_exec tsc_scaling
bugs : spectre_v1 spectre_v2 spec_store_bypass swapgs itlb_multihit
bogomips : 2995.20
clflush size : 64
cache_alignment : 64
address sizes : 39 bits physical, 48 bits virtual
power management:

29
lib/spack/spack/test/data/targets/linux-rhel6-piledriver
View File

@ -1,29 +0,0 @@
processor : 0
vendor_id : AuthenticAMD
cpu family : 21
model : 2
model name : AMD FX(tm)-8350 Eight-Core Processor
stepping : 0
microcode : 0x6000832
cpu MHz : 4013.832
cache size : 2048 KB
physical id : 0
siblings : 8
core id : 0
cpu cores : 4
apicid : 16
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc extd_apicid aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 popcnt aes xsave avx f16c lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs xop skinit wdt lwp fma4 tce nodeid_msr tbm topoext perfctr_core perfctr_nb arat cpb hw_pstate npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold vmmcall bmi1
bugs : fxsave_leak sysret_ss_attrs
bogomips : 8030.15
TLB size : 1536 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 48 bits physical, 48 bits virtual
power management: ts ttp tm 100mhzsteps hwpstate cpb eff_freq_ro
# /proc/cpuinfo taken from https://www.redhat.com/archives/vfio-users/2015-August/msg00111.html

25
lib/spack/spack/test/data/targets/linux-rhel7-broadwell
View File

@ -1,25 +0,0 @@
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 79
model name : Intel(R) Xeon(R) CPU E5-2690 v4 @ 2.60GHz
stepping : 1
microcode : 0xb00002a
cpu MHz : 2600.000
cache size : 35840 KB
physical id : 0
siblings : 14
core id : 0
cpu cores : 14
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 20
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 ds_cpl vmx smx est tm2 ssse3 fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch epb cat_l3 cdp_l3 invpcid_single intel_pt tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm rdt_a rdseed adx smap xsaveopt cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local ibpb ibrs stibp dtherm arat pln pts spec_ctrl intel_stibp
bogomips : 5188.06
clflush size : 64
cache_alignment : 64
address sizes : 46 bits physical, 48 bits virtual
power management:

25
lib/spack/spack/test/data/targets/linux-rhel7-haswell
View File

@ -1,25 +0,0 @@
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 63
model name : Intel(R) Xeon(R) CPU E5-2680 v3 @ 2.50GHz
stepping : 2
microcode : 0x3c
cpu MHz : 1757.910
cache size : 30720 KB
physical id : 0
siblings : 12
core id : 0
cpu cores : 12
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 15
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm epb invpcid_single tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid cqm xsaveopt cqm_llc cqm_occup_llc ibpb ibrs stibp dtherm arat pln pts spec_ctrl intel_stibp
bogomips : 4987.97
clflush size : 64
cache_alignment : 64
address sizes : 46 bits physical, 48 bits virtual
power management:

25
lib/spack/spack/test/data/targets/linux-rhel7-ivybridge
View File

@ -1,25 +0,0 @@
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 62
model name : Intel(R) Xeon(R) CPU E5-2650 v2 @ 2.60GHz
stepping : 4
microcode : 0x42c
cpu MHz : 1862.554
cache size : 20480 KB
physical id : 0
siblings : 8
core id : 0
cpu cores : 8
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm epb tpr_shadow vnmi flexpriority ept vpid fsgsbase smep erms xsaveopt ibpb ibrs stibp dtherm ida arat pln pts spec_ctrl intel_stibp
bogomips : 5200.15
clflush size : 64
cache_alignment : 64
address sizes : 46 bits physical, 48 bits virtual
power management:

25
lib/spack/spack/test/data/targets/linux-rhel7-skylake_avx512
View File

@ -1,25 +0,0 @@
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 85
model name : Intel(R) Xeon(R) Gold 6132 CPU @ 2.60GHz
stepping : 4
microcode : 0x200004d
cpu MHz : 2600.000
cache size : 19712 KB
physical id : 0
siblings : 14
core id : 0
cpu cores : 14
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 22
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch epb cat_l3 cdp_l3 invpcid_single intel_pt tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local ibpb ibrs stibp dtherm ida arat pln pts spec_ctrl intel_stibp ssbd
bogomips : 5200.00
clflush size : 64
cache_alignment : 64
address sizes : 46 bits physical, 48 bits virtual
power management:

26
lib/spack/spack/test/data/targets/linux-rhel7-zen
View File

@ -1,26 +0,0 @@
processor : 0
vendor_id : AuthenticAMD
cpu family : 23
model : 1
model name : AMD EPYC 7301 16-Core Processor
stepping : 2
microcode : 0x8001227
cpu MHz : 2200.000
cache size : 512 KB
physical id : 0
siblings : 32
core id : 0
cpu cores : 16
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc art rep_good nopl nonstop_tsc extd_apicid amd_dcm aperfmperf eagerfpu pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_l2 cpb hw_pstate retpoline_amd ssbd ibpb vmmcall fsgsbase bmi1 avx2 smep bmi2 rdseed adx smap clflushopt sha_ni xsaveopt xsavec xgetbv1 clzero irperf xsaveerptr arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif overflow_recov succor smca
bogomips : 4399.40
TLB size : 2560 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 48 bits physical, 48 bits virtual
power management: ts ttp tm hwpstate cpb eff_freq_ro [13] [14]

26
lib/spack/spack/test/data/targets/linux-scientific7-k10
View File

@ -1,26 +0,0 @@
processor : 0
vendor_id : AuthenticAMD
cpu family : 16
model : 9
model name : AMD Opteron(tm) Processor 6136
stepping : 1
microcode : 0x10000d9
cpu MHz : 800.000
cache size : 512 KB
physical id : 0
siblings : 8
core id : 0
cpu cores : 8
apicid : 16
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 5
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc art rep_good nopl nonstop_tsc extd_apicid amd_dcm pni monitor cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt nodeid_msr hw_pstate retpoline_amd ibp_disable vmmcall npt lbrv svm_lock nrip_save pausefilter
bogomips : 4800.19
TLB size : 1024 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 48 bits physical, 48 bits virtual
power management: ts ttp tm stc 100mhzsteps hwpstate

26
lib/spack/spack/test/data/targets/linux-scientific7-piledriver
View File

@ -1,26 +0,0 @@
processor : 0
vendor_id : AuthenticAMD
cpu family : 21
model : 2
model name : AMD Opteron(tm) Processor 6320
stepping : 0
microcode : 0x6000852
cpu MHz : 1400.000
cache size : 2048 KB
physical id : 0
siblings : 8
core id : 0
cpu cores : 4
apicid : 32
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc art rep_good nopl nonstop_tsc extd_apicid amd_dcm aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 popcnt aes xsave avx f16c lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs xop skinit wdt fma4 tce nodeid_msr tbm topoext perfctr_core perfctr_nb cpb hw_pstate retpoline_amd ssbd ibpb vmmcall bmi1 arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold
bogomips : 5600.11
TLB size : 1536 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 48 bits physical, 48 bits virtual
power management: ts ttp tm 100mhzsteps hwpstate cpb eff_freq_ro

25
lib/spack/spack/test/data/targets/linux-scientificfermi6-bulldozer
View File

@ -1,25 +0,0 @@
processor : 0
vendor_id : AuthenticAMD
cpu family : 21
model : 1
model name : AMD Opteron(TM) Processor 6212
stepping : 2
cpu MHz : 2600.188
cache size : 2048 KB
physical id : 0
siblings : 8
core id : 0
cpu cores : 4
apicid : 32
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nonstop_tsc extd_apicid amd_dcm aperfmperf pni pclmulqdq monitor ssse3 cx16 sse4_1 sse4_2 popcnt aes xsave avx lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs xop skinit wdt lwp fma4 nodeid_msr topoext perfctr_core perfctr_nb cpb ssbd retpoline ibpb npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold
bogomips : 5200.37
TLB size : 1536 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 48 bits physical, 48 bits virtual
power management: ts ttp tm 100mhzsteps hwpstate cpb

25
lib/spack/spack/test/data/targets/linux-scientificfermi6-piledriver
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@ -1,25 +0,0 @@
processor : 31
vendor_id : AuthenticAMD
cpu family : 21
model : 2
model name : AMD Opteron(tm) Processor 6320
stepping : 0
cpu MHz : 2800.154
cache size : 2048 KB
physical id : 3
siblings : 8
core id : 3
cpu cores : 4
apicid : 135
initial apicid : 103
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nonstop_tsc extd_apicid amd_dcm aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 popcnt aes xsave avx f16c lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs xop skinit wdt lwp fma4 tce nodeid_msr tbm topoext perfctr_core perfctr_nb cpb ssbd retpoline ibpb npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold bmi1
bogomips : 5599.22
TLB size : 1536 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 48 bits physical, 48 bits virtual
power management: ts ttp tm 100mhzsteps hwpstate cpb eff_freq_ro

26
lib/spack/spack/test/data/targets/linux-ubuntu18.04-broadwell
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@ -1,26 +0,0 @@
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 61
model name : Intel(R) Core(TM) i5-5200U CPU @ 2.20GHz
stepping : 4
microcode : 0x2d
cpu MHz : 1944.124
cache size : 3072 KB
physical id : 0
siblings : 4
core id : 0
cpu cores : 2
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 20
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb invpcid_single pti ssbd ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid rdseed adx smap intel_pt xsaveopt dtherm ida arat pln pts md_clear flush_l1d
bugs : cpu_meltdown spectre_v1 spectre_v2 spec_store_bypass l1tf mds
bogomips : 4389.80
clflush size : 64
cache_alignment : 64
address sizes : 39 bits physical, 48 bits virtual
power management:

293
lib/spack/spack/test/llnl/util/cpu.py
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@ -1,293 +0,0 @@
# Copyright 2013-2020 Lawrence Livermore National Security, LLC and other
# Spack Project Developers. See the top-level COPYRIGHT file for details.
#
# SPDX-License-Identifier: (Apache-2.0 OR MIT)
import pytest
import contextlib
import os.path
import jsonschema
import llnl.util.cpu
import llnl.util.cpu.detect
import spack.paths
# This is needed to check that with repr we could create equivalent objects
from llnl.util.cpu import Microarchitecture # noqa
@pytest.fixture(params=[
'linux-ubuntu18.04-broadwell',
'linux-rhel7-broadwell',
'linux-rhel7-skylake_avx512',
'linux-rhel7-ivybridge',
'linux-rhel7-haswell',
'linux-rhel7-zen',
'linux-scientific7-k10',
'linux-scientificfermi6-bulldozer',
'linux-scientificfermi6-piledriver',
'linux-scientific7-piledriver',
'linux-rhel6-piledriver',
'linux-centos7-power8le',
'linux-centos7-thunderx2',
'linux-centos7-cascadelake',
'linux-fedora32-icelake',
'darwin-mojave-ivybridge',
'darwin-mojave-haswell',
'darwin-mojave-skylake',
])
def expected_target(request, monkeypatch):
cpu = llnl.util.cpu
platform, operating_system, target = request.param.split('-')
architecture_family = llnl.util.cpu.targets[target].family
monkeypatch.setattr(
cpu.detect.platform, 'machine', lambda: str(architecture_family)
)
# Monkeypatch for linux
if platform == 'linux':
monkeypatch.setattr(cpu.detect.platform, 'system', lambda: 'Linux')
@contextlib.contextmanager
def _open(not_used_arg):
filename = os.path.join(
spack.paths.test_path, 'data', 'targets', request.param
)
with open(filename) as f:
yield f
monkeypatch.setattr(cpu.detect, 'open', _open, raising=False)
elif platform == 'darwin':
monkeypatch.setattr(cpu.detect.platform, 'system', lambda: 'Darwin')
filename = os.path.join(
spack.paths.test_path, 'data', 'targets', request.param
)
info = {}
with open(filename) as f:
for line in f:
key, value = line.split(':')
info[key.strip()] = value.strip()
def _check_output(args, env):
current_key = args[-1]
return info[current_key]
monkeypatch.setattr(cpu.detect, 'check_output', _check_output)
return llnl.util.cpu.targets[target]
@pytest.fixture(params=[x for x in llnl.util.cpu.targets])
def supported_target(request):
return request.param
@pytest.mark.regression('13803')
def test_target_detection(expected_target):
detected_target = llnl.util.cpu.host()
assert detected_target == expected_target
def test_no_dashes_in_target_names(supported_target):
assert '-' not in supported_target
def test_str_conversion(supported_target):
assert supported_target == str(llnl.util.cpu.targets[supported_target])
def test_repr_conversion(supported_target):
target = llnl.util.cpu.targets[supported_target]
assert eval(repr(target)) == target
def test_equality(supported_target):
target = llnl.util.cpu.targets[supported_target]
for name, other_target in llnl.util.cpu.targets.items():
if name == supported_target:
assert other_target == target
else:
assert other_target != target
@pytest.mark.parametrize('operation,expected_result', [
# Test microarchitectures that are ordered with respect to each other
('x86_64 < skylake', True),
('icelake > skylake', True),
('piledriver <= steamroller', True),
('zen2 >= zen', True),
('zen >= zen', True),
('aarch64 <= thunderx2', True),
('aarch64 <= a64fx', True),
# Test unrelated microarchitectures
('power8 < skylake', False),
('power8 <= skylake', False),
('skylake < power8', False),
('skylake <= power8', False),
# Test microarchitectures of the same family that are not a "subset"
# of each other
('cascadelake > cannonlake', False),
('cascadelake < cannonlake', False),
('cascadelake <= cannonlake', False),
('cascadelake >= cannonlake', False),
('cascadelake == cannonlake', False),
('cascadelake != cannonlake', True)
])
def test_partial_ordering(operation, expected_result):
target, operator, other_target = operation.split()
target = llnl.util.cpu.targets[target]
other_target = llnl.util.cpu.targets[other_target]
code = 'target ' + operator + 'other_target'
assert eval(code) is expected_result
@pytest.mark.parametrize('target_name,expected_family', [
('skylake', 'x86_64'),
('zen', 'x86_64'),
('pentium2', 'x86'),
])
def test_architecture_family(target_name, expected_family):
target = llnl.util.cpu.targets[target_name]
assert str(target.family) == expected_family
@pytest.mark.parametrize('target_name,feature', [
('skylake', 'avx2'),
('icelake', 'avx512f'),
# Test feature aliases
('icelake', 'avx512'),
('skylake', 'sse3'),
('power8', 'altivec'),
('broadwell', 'sse4.1'),
('skylake', 'clflushopt'),
('aarch64', 'neon')
])
def test_features_query(target_name, feature):
target = llnl.util.cpu.targets[target_name]
assert feature in target
@pytest.mark.parametrize('target_name,wrong_feature', [
('skylake', 1),
('bulldozer', llnl.util.cpu.targets['x86_64'])
])
def test_wrong_types_for_features_query(target_name, wrong_feature):
target = llnl.util.cpu.targets[target_name]
with pytest.raises(TypeError, match='only objects of string types'):
assert wrong_feature in target
def test_generic_microarchitecture():
generic_march = llnl.util.cpu.generic_microarchitecture('foo')
assert generic_march.name == 'foo'
assert not generic_march.features
assert not generic_march.ancestors
assert generic_march.vendor == 'generic'
def test_target_json_schema():
# The file microarchitectures.json contains static data i.e. data that is
# not meant to be modified by users directly. It is thus sufficient to
# validate it only once during unit tests.
json_data = llnl.util.cpu.schema.targets_json.data
jsonschema.validate(json_data, llnl.util.cpu.schema.schema)
@pytest.mark.parametrize('target_name,compiler,version,expected_flags', [
# Test GCC
('x86_64', 'gcc', '4.9.3', '-march=x86-64 -mtune=generic'),
('x86_64', 'gcc', '4.2.0', '-march=x86-64 -mtune=generic'),
('x86_64', 'gcc', '4.1.1', '-march=x86-64 -mtune=x86-64'),
('nocona', 'gcc', '4.9.3', '-march=nocona -mtune=nocona'),
('nehalem', 'gcc', '4.9.3', '-march=nehalem -mtune=nehalem'),
('nehalem', 'gcc', '4.8.5', '-march=corei7 -mtune=corei7'),
('sandybridge', 'gcc', '4.8.5', '-march=corei7-avx -mtune=corei7-avx'),
('thunderx2', 'gcc', '4.8.5', '-march=armv8-a'),
('thunderx2', 'gcc', '4.9.3', '-march=armv8-a+crc+crypto'),
# Test Clang / LLVM
('sandybridge', 'clang', '3.9.0', '-march=sandybridge -mtune=sandybridge'),
('icelake', 'clang', '6.0.0', '-march=icelake -mtune=icelake'),
('icelake', 'clang', '8.0.0',
'-march=icelake-client -mtune=icelake-client'),
('icelake', 'gcc', '8.1.0',
'-march=icelake-client -mtune=icelake-client'),
('zen2', 'clang', '9.0.0', '-march=znver2 -mtune=znver2'),
('power9le', 'clang', '8.0.0', '-mcpu=power9 -mtune=power9'),
('thunderx2', 'clang', '6.0.0', '-mcpu=thunderx2t99'),
# Test Intel on Intel CPUs
('sandybridge', 'intel', '17.0.2', '-march=corei7-avx -mtune=corei7-avx'),
('sandybridge', 'intel', '18.0.5',
'-march=sandybridge -mtune=sandybridge'),
# Test Intel on AMD CPUs
pytest.param('steamroller', 'intel', '17.0.2', '-msse4.2',
marks=pytest.mark.filterwarnings('ignore::UserWarning')),
pytest.param('zen', 'intel', '17.0.2', '-march=core-avx2 -mtune=core-avx2',
marks=pytest.mark.filterwarnings('ignore::UserWarning')),
# Test that an unknown compiler returns an empty string
('sandybridge', 'unknown', '4.8.5', ''),
])
def test_optimization_flags(target_name, compiler, version, expected_flags):
target = llnl.util.cpu.targets[target_name]
flags = target.optimization_flags(compiler, version)
assert flags == expected_flags
@pytest.mark.parametrize('target_name,compiler,version', [
('excavator', 'gcc', '4.8.5')
])
def test_unsupported_optimization_flags(target_name, compiler, version):
target = llnl.util.cpu.targets[target_name]
with pytest.raises(
llnl.util.cpu.UnsupportedMicroarchitecture,
match='cannot produce optimized binary'
):
target.optimization_flags(compiler, version)
@pytest.mark.parametrize('operation,expected_result', [
# In the tests below we won't convert the right hand side to
# Microarchitecture, so that automatic conversion from a known
# target name will be tested
('cascadelake > cannonlake', False),
('cascadelake < cannonlake', False),
('cascadelake <= cannonlake', False),
('cascadelake >= cannonlake', False),
('cascadelake == cannonlake', False),
('cascadelake != cannonlake', True)
])
def test_automatic_conversion_on_comparisons(operation, expected_result):
target, operator, other_target = operation.split()
target = llnl.util.cpu.targets[target]
code = 'target ' + operator + 'other_target'
assert eval(code) is expected_result
@pytest.mark.parametrize('version,expected_number,expected_suffix', [
('4.2.0', '4.2.0', ''),
('4.2.0-apple', '4.2.0', 'apple'),
('my-funny-name-with-dashes', '', 'my-funny-name-with-dashes'),
('10.3.56~svnr64537', '10.3.56', '~svnr64537')
])
def test_version_components(version, expected_number, expected_suffix):
number, suffix = llnl.util.cpu.version_components(version)
assert number == expected_number
assert suffix == expected_suffix
def test_invalid_family():
targets = llnl.util.cpu.targets
multi_parents = Microarchitecture(
name='chimera', parents=[targets['pentium4'], targets['power7']],
vendor='Imagination', features=[], compilers={}, generation=0
)
with pytest.raises(AssertionError,
match='a target is expected to belong'):
multi_parents.family

12
var/spack/repos/builtin/packages/gromacs/package.py
View File

@ -2,7 +2,7 @@
# Spack Project Developers. See the top-level COPYRIGHT file for details.
#
# SPDX-License-Identifier: (Apache-2.0 OR MIT)
import llnl.util.cpu
import archspec.cpu
class Gromacs(CMakePackage):
@ -158,25 +158,25 @@ def cmake_args(self):
# Activate SIMD based on properties of the target
target = self.spec.target
if target >= llnl.util.cpu.targets['zen2']:
if target >= archspec.cpu.TARGETS['zen2']:
# AMD Family 17h (EPYC Rome)
options.append('-DGMX_SIMD=AVX2_256')
elif target >= llnl.util.cpu.targets['zen']:
elif target >= archspec.cpu.TARGETS['zen']:
# AMD Family 17h (EPYC Naples)
options.append('-DGMX_SIMD=AVX2_128')
elif target >= llnl.util.cpu.targets['bulldozer']:
elif target >= archspec.cpu.TARGETS['bulldozer']:
# AMD Family 15h
options.append('-DGMX_SIMD=AVX_128_FMA')
elif 'vsx' in target:
# IBM Power 7 and beyond
options.append('-DGMX_SIMD=IBM_VSX')
elif target.family == llnl.util.cpu.targets['aarch64']:
elif target.family == archspec.cpu.TARGETS['aarch64']:
# ARMv8
if self.spec.satisfies('%nvhpc'):
options.append('-DGMX_SIMD=None')
else:
options.append('-DGMX_SIMD=ARM_NEON_ASIMD')
elif target == llnl.util.cpu.targets['mic_knl']:
elif target == archspec.cpu.TARGETS['mic_knl']:
# Intel KNL
options.append('-DGMX_SIMD=AVX_512_KNL')
elif target.vendor == 'GenuineIntel':