From e76cfbbfd8707716a02f9849fbba962c20f0c37f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ond=C5=99ej=20=C4=8Cert=C3=ADk?= Date: Fri, 13 Oct 2017 11:20:49 -0600 Subject: [PATCH] Fix m4 to compile with Intel (#5728) Fixes #5705. --- var/spack/repos/builtin/packages/m4/package.py | 3 +++ 1 file changed, 3 insertions(+) diff --git a/var/spack/repos/builtin/packages/m4/package.py b/var/spack/repos/builtin/packages/m4/package.py index 5c9655d7e3e..2523745e58a 100644 --- a/var/spack/repos/builtin/packages/m4/package.py +++ b/var/spack/repos/builtin/packages/m4/package.py @@ -51,6 +51,9 @@ def configure_args(self): if spec.satisfies('%clang') and not spec.satisfies('platform=darwin'): args.append('CFLAGS=-rtlib=compiler-rt') + if spec.satisfies('%intel'): + args.append('CFLAGS=-no-gcc') + if '+sigsegv' in spec: args.append('--with-libsigsegv-prefix={0}'.format( spec['libsigsegv'].prefix))