i1 muls can sometimes happen after SCEV. They resulted in

ISel failures because we were missing the patterns for them.

var/spack/repos/builtin/packages/hip/package.py

@@ -123,7 +123,6 @@ class Hip(CMakePackage):
     test_requires_compiler = True
 
     with when("+rocm"):
-        depends_on("mesa~llvm")
         depends_on("gl@4.5:")
         depends_on("py-cppheaderparser", type="build", when="@5.3.3:")
         for ver in [

var/spack/repos/builtin/packages/llvm-amdgpu/package.py

@@ -163,6 +163,7 @@ class LlvmAmdgpu(CMakePackage):
     # Below patch is to look in the old path.
     patch("adjust-openmp-bitcode-directory-for-llvm-link.patch", when="@5.2.0:")
     patch("patch-llvm-5.5.0.patch", when="@5.5:")
+    patch("001-Add-i1-mul-patterns.patch", when="@5.6:")
 
     conflicts("^cmake@3.19.0")
 

var/spack/repos/builtin/packages/llvm/package.py

@@ -243,6 +243,8 @@ class Llvm(CMakePackage, CudaPackage):
         description="Enable zstd support for static analyzer / lld",
     )
 
+    provides("libllvm@16", when="@16.0.0:16")
+    provides("libllvm@15", when="@15.0.0:15")
     provides("libllvm@14", when="@14.0.0:14")
     provides("libllvm@13", when="@13.0.0:13")
     provides("libllvm@12", when="@12.0.0:12")